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[Qemu-devel] [PATCH v1 03/16] target-microblaze: Preserve the pvr regist
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH v1 03/16] target-microblaze: Preserve the pvr registers during reset |
Date: |
Sun, 21 Jun 2015 21:56:14 +1000 |
From: Alistair Francis <address@hidden>
Move the Microblaze PVR registers to the end of the CPUMBState
and preserve them during reset. This is similar to what the
QEMU ARM model does with some of it's registers.
This allows the Microblaze PVR registers to only be set once
at realise instead of constantly at reset.
Signed-off-by: Alistair Francis <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target-microblaze/cpu.c | 40 ++++++++++++++++++++++------------------
target-microblaze/cpu.h | 10 ++++++----
2 files changed, 28 insertions(+), 22 deletions(-)
diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c
index 67e3182..95be540 100644
--- a/target-microblaze/cpu.c
+++ b/target-microblaze/cpu.c
@@ -63,13 +63,34 @@ static void mb_cpu_reset(CPUState *s)
mcc->parent_reset(s);
- memset(env, 0, sizeof(CPUMBState));
+ memset(env, 0, offsetof(CPUMBState, pvr));
env->res_addr = RES_ADDR_NONE;
tlb_flush(s, 1);
/* Disable stack protector. */
env->shr = ~0;
+#if defined(CONFIG_USER_ONLY)
+ /* start in user mode with interrupts enabled. */
+ env->sregs[SR_MSR] = MSR_EE | MSR_IE | MSR_VM | MSR_UM;
+#else
+ env->sregs[SR_MSR] = 0;
+ mmu_init(&env->mmu);
+ env->mmu.c_mmu = 3;
+ env->mmu.c_mmu_tlb_access = 3;
+ env->mmu.c_mmu_zones = 16;
+#endif
+}
+
+static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+ CPUState *cs = CPU(dev);
+ MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_GET_CLASS(dev);
+ MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
+ CPUMBState *env = &cpu->env;
+
+ qemu_init_vcpu(cs);
+
env->pvr.regs[0] = PVR0_PVR_FULL_MASK \
| PVR0_USE_BARREL_MASK \
| PVR0_USE_DIV_MASK \
@@ -99,25 +120,8 @@ static void mb_cpu_reset(CPUState *s)
env->sregs[SR_PC] = cpu->base_vectors;
#if defined(CONFIG_USER_ONLY)
- /* start in user mode with interrupts enabled. */
- env->sregs[SR_MSR] = MSR_EE | MSR_IE | MSR_VM | MSR_UM;
env->pvr.regs[10] = 0x0c000000; /* Spartan 3a dsp. */
-#else
- env->sregs[SR_MSR] = 0;
- mmu_init(&env->mmu);
- env->mmu.c_mmu = 3;
- env->mmu.c_mmu_tlb_access = 3;
- env->mmu.c_mmu_zones = 16;
#endif
-}
-
-static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
-{
- CPUState *cs = CPU(dev);
- MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_GET_CLASS(dev);
-
- cpu_reset(cs);
- qemu_init_vcpu(cs);
mcc->parent_realize(dev, errp);
}
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index d73e1c7..534e1cf 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -260,16 +260,18 @@ struct CPUMBState {
#define IFLAGS_TB_MASK (D_FLAG | IMM_FLAG | DRTI_FLAG | DRTE_FLAG | DRTB_FLAG)
uint32_t iflags;
- struct {
- uint32_t regs[16];
- } pvr;
-
#if !defined(CONFIG_USER_ONLY)
/* Unified MMU. */
struct microblaze_mmu mmu;
#endif
CPU_COMMON
+
+ /* These fields are preserved on reset. */
+
+ struct {
+ uint32_t regs[16];
+ } pvr;
};
#include "cpu-qom.h"
--
1.9.1
- [Qemu-devel] [PATCH v1 00/16] Microblaze Queue, Edgar E. Iglesias, 2015/06/21
- [Qemu-devel] [PATCH v1 01/16] microblaze: s3adsp: Instantiate CPU using QOM, Edgar E. Iglesias, 2015/06/21
- [Qemu-devel] [PATCH v1 02/16] target-microblaze: Fix up indentation, Edgar E. Iglesias, 2015/06/21
- [Qemu-devel] [PATCH v1 03/16] target-microblaze: Preserve the pvr registers during reset,
Edgar E. Iglesias <=
- [Qemu-devel] [PATCH v1 05/16] target-microblaze: Tidy up the base-vectors property, Edgar E. Iglesias, 2015/06/21
- [Qemu-devel] [PATCH v1 06/16] target-microblaze: Convert use-fpu to a CPU property, Edgar E. Iglesias, 2015/06/21
- [Qemu-devel] [PATCH v1 07/16] target-microblaze: Disable stack protection by default, Edgar E. Iglesias, 2015/06/21
- [Qemu-devel] [PATCH v1 08/16] target-microblaze: Rename the usefpu variable, Edgar E. Iglesias, 2015/06/21
- [Qemu-devel] [PATCH v1 11/16] target-microblaze: Convert endi to a CPU property, Edgar E. Iglesias, 2015/06/21
- [Qemu-devel] [PATCH v1 12/16] target-microblaze: Convert version_mask to a CPU property, Edgar E. Iglesias, 2015/06/21
- [Qemu-devel] [PATCH v1 13/16] target-microblaze: Convert pvr-full to a CPU property, Edgar E. Iglesias, 2015/06/21
- [Qemu-devel] [PATCH v1 14/16] ml605_mmu: Move the hardcoded values to the init function, Edgar E. Iglesias, 2015/06/21
- [Qemu-devel] [PATCH v1 15/16] s3adsp1800: Remove the hardcoded values from the reset, Edgar E. Iglesias, 2015/06/21
- [Qemu-devel] [PATCH v1 16/16] target-microblaze: Remove dead code, Edgar E. Iglesias, 2015/06/21