[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v9 1/4] apic: map APIC's MMIO region at each CPU's a
From: |
Zhu Guihua |
Subject: |
[Qemu-devel] [PATCH v9 1/4] apic: map APIC's MMIO region at each CPU's address space |
Date: |
Fri, 3 Jul 2015 17:38:56 +0800 |
From: Chen Fan <address@hidden>
Replace mapping APIC at global system address space with
mapping it at per-CPU address spaces.
Signed-off-by: Chen Fan <address@hidden>
Signed-off-by: Zhu Guihua <address@hidden>
---
hw/i386/pc.c | 7 -------
hw/intc/apic_common.c | 6 ------
target-i386/cpu.c | 21 +++++++++++++++++++++
3 files changed, 21 insertions(+), 13 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 7072930..9f16128 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1076,13 +1076,6 @@ void pc_cpus_init(const char *cpu_model, DeviceState
*icc_bridge)
object_unref(OBJECT(cpu));
}
- /* map APIC MMIO area if CPU has APIC */
- if (cpu && cpu->apic_state) {
- /* XXX: what if the base changes? */
- sysbus_mmio_map_overlap(SYS_BUS_DEVICE(icc_bridge), 0,
- APIC_DEFAULT_ADDRESS, 0x1000);
- }
-
/* tell smbios about cpuid version and features */
smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
}
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index 0032b97..c0b32eb 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -296,7 +296,6 @@ static void apic_common_realize(DeviceState *dev, Error
**errp)
APICCommonClass *info;
static DeviceState *vapic;
static int apic_no;
- static bool mmio_registered;
if (apic_no >= MAX_APICS) {
error_setg(errp, "%s initialization failed.",
@@ -307,11 +306,6 @@ static void apic_common_realize(DeviceState *dev, Error
**errp)
info = APIC_COMMON_GET_CLASS(s);
info->realize(dev, errp);
- if (!mmio_registered) {
- ICCBus *b = ICC_BUS(qdev_get_parent_bus(dev));
- memory_region_add_subregion(b->apic_address_space, 0, &s->io_memory);
- mmio_registered = true;
- }
/* Note: We need at least 1M to map the VAPIC option ROM */
if (!vapic && s->vapic_control & VAPIC_ENABLE_MASK &&
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 36b07f9..11affce 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2741,6 +2741,7 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
/* TODO: convert to link<> */
apic = APIC_COMMON(cpu->apic_state);
apic->cpu = cpu;
+ apic->apicbase = APIC_DEFAULT_ADDRESS | MSR_IA32_APICBASE_ENABLE;
}
static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
@@ -2785,8 +2786,10 @@ static void x86_cpu_realizefn(DeviceState *dev, Error
**errp)
X86CPU *cpu = X86_CPU(dev);
X86CPUClass *xcc = X86_CPU_GET_CLASS(dev);
CPUX86State *env = &cpu->env;
+ APICCommonState *apic;
Error *local_err = NULL;
static bool ht_warned;
+ static bool apic_mmio_map_once;
if (cpu->apic_id < 0) {
error_setg(errp, "apic-id property was not initialized properly");
@@ -2873,6 +2876,24 @@ static void x86_cpu_realizefn(DeviceState *dev, Error
**errp)
if (local_err != NULL) {
goto out;
}
+
+ /* map APIC MMIO area */
+ apic = APIC_COMMON(cpu->apic_state);
+ if (tcg_enabled()) {
+ memory_region_add_subregion_overlap(cpu->cpu_as_root,
+ apic->apicbase &
+ MSR_IA32_APICBASE_BASE,
+ &apic->io_memory,
+ 0x1000);
+ } else if (!apic_mmio_map_once) {
+ memory_region_add_subregion_overlap(get_system_memory(),
+ apic->apicbase &
+ MSR_IA32_APICBASE_BASE,
+ &apic->io_memory,
+ 0x1000);
+ apic_mmio_map_once = true;
+ }
+
cpu_reset(cs);
xcc->parent_realize(dev, &local_err);
--
1.9.3