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From: | Richard Henderson |
Subject: | Re: [Qemu-devel] [PATCH RFC 9/9] tcg: update README about size changing ops |
Date: | Fri, 17 Jul 2015 07:42:55 +0100 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.0.1 |
On 07/15/2015 12:03 PM, Aurelien Jarno wrote:
+These ops are all optional in that case they are implemented as mov. +This is to allow some optimizations if the target maintains registers +zero or sign extended. For example a MIPS64 CPU requires that all +32-bit values are stored sign-extended in the registers. This means +the trunc_shr_i64_i32 should sign-extend the value when moving it +from a 64-bit to a 32-bit register. It also means ext_i32_i64 can be +implemented as a simple mov as the value is already sign extended.
We need better wording. Each one of the three are optional, and the other two must be implemented. I think we ought to have a check in tcg.c about this, in tcg_add_target_add_op_defs.
r~
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