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Re: [Qemu-devel] [PATCH v1 1/1] target-microblaze: Set the PC in reset i
From: |
Edgar E. Iglesias |
Subject: |
Re: [Qemu-devel] [PATCH v1 1/1] target-microblaze: Set the PC in reset instead of realize |
Date: |
Sat, 25 Jul 2015 12:45:08 +1000 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Thu, Jul 23, 2015 at 08:13:56AM -0700, Alistair Francis wrote:
> Set the Microblaze CPU PC in the reset instead of setting it
> in the realize. This is required as the PC is zeroed in the
> reset function and causes problems in some situations.
>
> Signed-off-by: Alistair Francis <address@hidden>
Looks good:
Reviewed-by: Edgar E. Iglesias <address@hidden>
I'll test and add this to my queue.
> ---
>
> target-microblaze/cpu.c | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c
> index 9ac509a..cbd84a2 100644
> --- a/target-microblaze/cpu.c
> +++ b/target-microblaze/cpu.c
> @@ -107,6 +107,8 @@ static void mb_cpu_reset(CPUState *s)
> /* Disable stack protector. */
> env->shr = ~0;
>
> + env->sregs[SR_PC] = cpu->cfg.base_vectors;
> +
> #if defined(CONFIG_USER_ONLY)
> /* start in user mode with interrupts enabled. */
> env->sregs[SR_MSR] = MSR_EE | MSR_IE | MSR_VM | MSR_UM;
> @@ -183,8 +185,6 @@ static void mb_cpu_realizefn(DeviceState *dev, Error
> **errp)
> env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */
> env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17);
>
> - env->sregs[SR_PC] = cpu->cfg.base_vectors;
> -
> mcc->parent_realize(dev, errp);
> }
>
> --
> 1.7.1
>