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Re: [Qemu-devel] [PATCH v3] hw/arm/virt: Add high MMIO PCI region


From: Igor Mammedov
Subject: Re: [Qemu-devel] [PATCH v3] hw/arm/virt: Add high MMIO PCI region
Date: Wed, 29 Jul 2015 11:32:45 +0200

On Wed, 29 Jul 2015 11:58:11 +0300
Pavel Fedin <address@hidden> wrote:

>  Hello!
> 
> > I'm not sure  but fixed hole start/size might be a problem later when 
> > adding memory hotplug
> wasting
> > address space.
> 
>  But 'virt' machine entirely relies on fixed layout. And, we can always 
> change it if we need to.
> 
> > 
> > On x86 we do it a little different, see call chain:
> >  acpi_setup -> build_ssdt ->
> >    i440fx_pcihost_get_pci_hole64_start -> pci_bus_get_w64_range
> >    ...                          _end -> ...
> > 
> > where acpi_setup() is called from pc_guest_info_machine_done() right before
> > guest starts and later after guest's BIOS(UEFI) initialized PCI devices.
> > 
> > Perhaps we should do the same for ARM as well, CCing Michael
> 
>  I took a look at the code. As far as i could understand, it iterates devices 
> on the bus and finds
> out start of the lowest assigned region and end of the highest assigned 
> region. Does it?
yep

>  I'm not sure that ARM architecture has this machine_done callback.
Maybe this would help you,
   git grep machine_done

> And, to tell the truth, i don't
> use EFI on my setup so i cannot test the thing.
>  So, can we leave fixed layout for now? 
I suppose we could, it just means that we will have to add version-ed machines 
like
it's done on x86 to keep memory layout on old machine type the same so that
hardware won't change under guest's feet unexpectedly.

Also in light of guests with huge memory size, 512Gb  gap for RAM seems too 
small,
what are limitations of ARM64 regarding max supported physical address bits?

Could we put this 64 bit PCI hole at the end of address space, leaving the rest 
of
address space for RAM or whatever?

> I am currently reworking the patch because i discovered
> problems with 32-bit guests. They simply truncate high word and end up in 
> attempt to put PCI at
> 0x00000000 - 0xFFFFFFFF, fail, and do not work of course. So, my next version 
> will have high MMIO
> only for 64-bit guests.
>  By the way, what is the most correct way to determine whether selected CPU 
> is 32 or 64 bit?
> 
> Kind regards,
> Pavel Fedin
> Expert Engineer
> Samsung Electronics Research center Russia
> 
> 




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