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Re: [Qemu-devel] [PATCH 0/2] target-mips: minor clean up in mtc0 and mfc
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From: |
Aurelien Jarno |
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Subject: |
Re: [Qemu-devel] [PATCH 0/2] target-mips: minor clean up in mtc0 and mfc0 |
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Date: |
Wed, 16 Sep 2015 06:46:17 +0200 |
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User-agent: |
Mutt/1.5.23 (2014-03-12) |
On 2015-09-14 13:45, Leon Alrae wrote:
> This patchset removes the gen_mtc0_store64() which is actually incorrect
> as MTC0 instruction in MIPS64 is supposed to move entire content (if
> dst CP0 register is 64-bit) without sign extending. It also removes the
> gen_mfc0_load64() and replaces the pair of tcg_gen_ld_tl() +
> tcg_gen_ext32s_tl() with single tcg_gen_ld32s_tl().
>
> Leon Alrae (2):
> target-mips: correct MTC0 instruction on MIPS64
> target-mips: remove gen_mfc0_load64() and use tcg_gen_ld32s_tl()
The existence of tcg_gen_ld32s_tl is relatively recent, that's why we
had it opened coded up to now.
Reviewed-by: Aurelien Jarno <address@hidden>
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
address@hidden http://www.aurel32.net