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[Qemu-devel] [PULL 26/26] tcg: Adjust CODE_GEN_AVG_BLOCK_SIZE
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 26/26] tcg: Adjust CODE_GEN_AVG_BLOCK_SIZE |
Date: |
Wed, 7 Oct 2015 20:43:51 +1100 |
At present, the "average" guestimate of TB size is way too small, leading
to many unused entries in the pre-allocated TB array. For a guest with 1GB
ram, we're currently allocating 256MB for the array.
Survey arm, alpha, aarch64, ppc, sparc, i686, x86_64 guests running on
x86_64 and ppc64 hosts and select a new average. The size of the array
drops to 81MB with no more flushing than before.
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
include/exec/exec-all.h | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 71c9d85..a63fd60 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -161,13 +161,14 @@ static inline void tlb_flush_by_mmuidx(CPUState *cpu, ...)
#define CODE_GEN_PHYS_HASH_BITS 15
#define CODE_GEN_PHYS_HASH_SIZE (1 << CODE_GEN_PHYS_HASH_BITS)
-/* estimated block size for TB allocation */
-/* XXX: use a per code average code fragment size and modulate it
- according to the host CPU */
+/* Estimated block size for TB allocation. */
+/* ??? The following is based on a 2015 survey of x86_64 host output.
+ Better would seem to be some sort of dynamically sized TB array,
+ adapting to the block sizes actually being produced. */
#if defined(CONFIG_SOFTMMU)
-#define CODE_GEN_AVG_BLOCK_SIZE 128
+#define CODE_GEN_AVG_BLOCK_SIZE 400
#else
-#define CODE_GEN_AVG_BLOCK_SIZE 64
+#define CODE_GEN_AVG_BLOCK_SIZE 150
#endif
#if defined(__arm__) || defined(_ARCH_PPC) \
--
2.4.3
- [Qemu-devel] [PULL 23/26] tcg: Emit prologue to the beginning of code_gen_buffer, (continued)
- [Qemu-devel] [PULL 23/26] tcg: Emit prologue to the beginning of code_gen_buffer, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 17/26] target-*: Drop cpu_gen_code define, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 20/26] tcg: Save insn data and use it in cpu_restore_state_from_tb, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 21/26] tcg: Remove gen_intermediate_code_pc, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 24/26] tcg: Allocate a guard page after code_gen_buffer, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 02/26] target-*: Unconditionally emit tcg_gen_insn_start, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 11/26] target-cris: Mirror gen_opc_pc into insn_start, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 08/26] target-mips: Add delayed branch state to insn_start, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 07/26] target-i386: Add cc_op state to insn_start, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 14/26] target-sparc: Remove gen_opc_jump_pc, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 26/26] tcg: Adjust CODE_GEN_AVG_BLOCK_SIZE,
Richard Henderson <=
- [Qemu-devel] [PULL 09/26] target-s390x: Add cc_op state to insn_start, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 12/26] target-sparc: Tidy gen_branch_a interface, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 01/26] tcg: Rename debug_insn_start to insn_start, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 15/26] target-sparc: Add npc state to insn_start, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 19/26] tcg: Pass data argument to restore_state_to_opc, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 25/26] tcg: Check for overflow via highwater mark, Richard Henderson, 2015/10/08
- Re: [Qemu-devel] [PULL 00/26] Do away with TB retranslation, Peter Maydell, 2015/10/08