Re: [Qemu-devel] [PATCH v3 1/9] target-arm: Add HPFAR_EL2

[Laurent Desnogues]

On Thu, Oct 8, 2015 at 10:24 AM, Alex Bennée <address@hidden> wrote:
>
> Laurent Desnogues <address@hidden> writes:
>
>> Hello,
>>
>> On Sun, Oct 4, 2015 at 12:38 AM, Edgar E. Iglesias
>> <address@hidden> wrote:
>>> From: "Edgar E. Iglesias" <address@hidden>
>>>
>>> Signed-off-by: Edgar E. Iglesias <address@hidden>
>>> ---
>>>  target-arm/cpu.h    |  1 +
>>>  target-arm/helper.c | 12 ++++++++++++
>>>  2 files changed, 13 insertions(+)
>>>
>>> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
>>> index cc1578c..895f2c2 100644
>>> --- a/target-arm/cpu.h
>>> +++ b/target-arm/cpu.h
>>> @@ -278,6 +278,7 @@ typedef struct CPUARMState {
>>>              };
>>>              uint64_t far_el[4];
>>>          };
>>> +        uint64_t hpfar_el2;
>>>          union { /* Translation result. */
>>>              struct {
>>>                  uint64_t _unused_par_0;
>>> diff --git a/target-arm/helper.c b/target-arm/helper.c
>>> index 8367997..5a5e5f0 100644
>>> --- a/target-arm/helper.c
>>> +++ b/target-arm/helper.c
>>> @@ -3223,6 +3223,10 @@ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = {
>>>      { .name = "CNTHP_CTL_EL2", .state = ARM_CP_STATE_BOTH,
>>>        .opc0 = 3, .opc1 = 4, .crn = 14, .crm = 2, .opc2 = 1,
>>>        .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
>>> +    { .name = "HPFAR_EL2", .state = ARM_CP_STATE_BOTH,
>>> +      .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4,
>>> +      .access = PL2_RW, .accessfn = access_el3_aa32ns_aa64any,
>>> +      .type = ARM_CP_CONST, .resetvalue = 0 },
>>>      REGINFO_SENTINEL
>>>  };
>>>
>>> @@ -3444,6 +3448,14 @@ static const ARMCPRegInfo el2_cp_reginfo[] = {
>>>        .resetvalue = 0,
>>>        .writefn = gt_hyp_ctl_write, .raw_writefn = raw_write },
>>>  #endif
>>> +    { .name = "HPFAR", .state = ARM_CP_STATE_AA32,
>>> +      .cp = 15, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4,
>>> +      .access = PL2_RW, .accessfn = access_el3_aa32ns,
>>> +      .fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) },
>>> +    { .name = "HPFAR_EL2", .state = ARM_CP_STATE_AA64,
>>> +      .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4,
>>> +      .access = PL2_RW,
>>> +      .fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) },
>>>      REGINFO_SENTINEL
>>>  };
>>
>> Shouldn't these last two registers be placed before the "#endif" which
>> closes an "#ifndef CONFIG_USER_ONLY"?
>
> There seem to be a bunch of _EL2 registers above the #ifndef as well so
> I'm not sure it matters. In fact won't the guest just trap if it tries?

That's correct.

But over the years a lot of code has been added that is completely
irrelevant to user mode.  An interesting experiment is to check how
the interrupt_request field of CPU is in fact not needed by
arm-linux-user.  You can prove it's only needed through a chain of
calls that originate from omap_wfi_write which is PL1_RW.  I agree
it's not a big deal, it's most likely only me who finds it ugly and
inefficient that an interrupt request field exists in user mode :-)

Anyway this in no case is a reason to not ack Edgar patch.


Laurent