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Re: [Qemu-devel] [PATCH v2 2/2] target-arm: Fix CPU breakpoint handling


From: Sergey Fedorov
Subject: Re: [Qemu-devel] [PATCH v2 2/2] target-arm: Fix CPU breakpoint handling
Date: Mon, 12 Oct 2015 15:41:09 +0300
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0

On 08.10.2015 21:40, Peter Maydell wrote:
> Annoying corner case which I don't think we need to handle necessarily:
> if you set a breakpoint on a 32-bit Thumb instruction which spans a page
> boundary, and the second page is not present, we will end up taking the
> page fault when I think we should take the breakpoint. I can't think
> of a way to get that right, so just commenting that it isn't handled
> right would do.

What I found in ARM ARMv8 (DDI0487A_g) section G2.9.1 About Breakpoint
exceptions:

For each instruction in the program flow, all of the breakpoints are
tested. When a breakpoint is tested, it generates
a Breakpoint debug event if all of the following are true:
• The breakpoint is enabled. That is, the breakpoint enable control for
it, DBGBCR<n>.E, is 1.
• The conditions specified in the DBGBCR<n> are met.
• The comparisons with the values held in one or both of the DBGBVR<n>
and DBGBXVR<n>, as applicable,
are successful.
• If the breakpoint is linked to another breakpoint, the comparisons
made by that other breakpoint are also
successful.
• The instruction is committed for execution.

If I understand correctly, the last item in the list specifies that any
page fault exception which would occur in the normal instruction
execution has more priority than the breakpoint exception. If so,
Everything should be okay.

Best regards,
Sergey



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