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Re: [Qemu-devel] [RFC PATCH v3 1/4] hw/intc/arm_gicv3_common: Add state


From: Peter Maydell
Subject: Re: [Qemu-devel] [RFC PATCH v3 1/4] hw/intc/arm_gicv3_common: Add state information
Date: Sat, 24 Oct 2015 13:35:44 +0100

On 24 October 2015 at 13:30, Shlomo Pongratz <address@hidden> wrote:
> Comment on the "workaround" see inline.
>

>> > +        /* Workaround!
>> > +         * Linux (drivers/irqchip/irq-gic-v3.c) is enabling only group
>> > one,
>> > +         * in gic_cpu_sys_reg_init it calls gic_write_grpen1(1);
>> > +         * but it doesn't conigure any interrupt to be in group one.
>> > +         * The same for SPIs below
>> > +         */
>>
>> Is this a bug in Linux, or is it just expecting that firmware configures
>> all interrupts into group 1 for it? (ie do we need some variation on
>> commit 8ff41f3995ad2d for gicv3 ?)
>
>
> I think it is a bug in Linux as I explain in the comment, as far as I know
> the kernel should not assume anything, that is if it wants ti use group one
> it should initialize it, but since I don't have a board with a GICv3
> (GIC500) I can't be sure.
> My purpose is to make the "virt" virtual machine work. Maybe this
> initialization should go there.

If it's a kernel bug we should just fix it in the kernel -- all
this GICv3 support is still sufficiently early that it seems to
me better to just fix the kernel than to carry around workarounds
for bugs.

thanks
-- PMM



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