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[Qemu-devel] [PATCH 12/18] armv7m: simpler/faster exception start
From: |
Michael Davidsaver |
Subject: |
[Qemu-devel] [PATCH 12/18] armv7m: simpler/faster exception start |
Date: |
Sun, 8 Nov 2015 20:11:39 -0500 |
No need to bounce through EXCP_IRQ handling
for non-IRQ exceptions. just update CPU
state directly.
Signed-off-by: Michael Davidsaver <address@hidden>
---
target-arm/helper.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 1d7ac43..2541890 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -5433,23 +5433,21 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
/* For exceptions we just mark as pending on the NVIC, and let that
handle it. */
- /* TODO: Need to escalate if the current priority is higher than the
- one we're raising. */
switch (cs->exception_index) {
case EXCP_UDEF:
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE);
- return;
+ break;
case EXCP_SWI:
/* The PC already points to the next instruction. */
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SVC);
- return;
+ break;
case EXCP_PREFETCH_ABORT:
case EXCP_DATA_ABORT:
/* TODO: if we implemented the MPU registers, this is where we
* should set the MMFAR, etc from exception.fsr and exception.vaddress.
*/
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_MEM);
- return;
+ break;
case EXCP_BKPT:
if (semihosting_enabled()) {
int nr;
@@ -5466,7 +5464,6 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_DEBUG);
return;
case EXCP_IRQ:
- env->v7m.exception = armv7m_nvic_acknowledge_irq(env->nvic);
break;
case EXCP_EXCEPTION_EXIT:
do_v7m_exception_exit(env);
@@ -5476,6 +5473,10 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
return; /* Never happens. Keep compiler happy. */
}
+ armv7m_nvic_acknowledge_irq(env->nvic);
+
+ qemu_log_mask(CPU_LOG_INT, "... as %d\n", env->v7m.exception);
+
/* Align stack pointer. */
/* ??? Should only do this if Configuration Control Register
STACKALIGN bit is set. */
--
2.1.4
- [Qemu-devel] [PATCH 04/18] armv7m: Explicit error for bad vector table, (continued)
- [Qemu-devel] [PATCH 04/18] armv7m: Explicit error for bad vector table, Michael Davidsaver, 2015/11/08
- [Qemu-devel] [PATCH 03/18] armv7m: Complain about incorrect exception table entries., Michael Davidsaver, 2015/11/08
- [Qemu-devel] [PATCH 01/18] armv7m: MRS/MSR handle unprivileged access, Michael Davidsaver, 2015/11/08
- [Qemu-devel] [PATCH 02/18] armv7m: Undo armv7m.hack, Michael Davidsaver, 2015/11/08
- [Qemu-devel] [PATCH 08/18] armv7m: fix RETTOBASE, Michael Davidsaver, 2015/11/08
- [Qemu-devel] [PATCH 09/18] armv7m: NVIC update vmstate, Michael Davidsaver, 2015/11/08
- [Qemu-devel] [PATCH 12/18] armv7m: simpler/faster exception start,
Michael Davidsaver <=
- [Qemu-devel] [PATCH 11/18] armv7m: fix I and F flag handling, Michael Davidsaver, 2015/11/08
- [Qemu-devel] [PATCH 10/18] armv7m: NVIC initialization, Michael Davidsaver, 2015/11/08
- [Qemu-devel] [PATCH 14/18] armv7m: auto-clear FAULTMASK, Michael Davidsaver, 2015/11/08
- [Qemu-devel] [PATCH 07/18] armv7m: Update NVIC registers, Michael Davidsaver, 2015/11/08
- [Qemu-devel] [PATCH 17/18] armv7m: implement CCR, Michael Davidsaver, 2015/11/08
- [Qemu-devel] [PATCH 15/18] arm: gic: Remove references to NVIC, Michael Davidsaver, 2015/11/08
- [Qemu-devel] [PATCH 16/18] armv7m: check exception return consistency, Michael Davidsaver, 2015/11/08
- [Qemu-devel] [PATCH 13/18] armv7m: implement CFSR and HFSR, Michael Davidsaver, 2015/11/08