Re: [Qemu-devel] SPI EEPROM device model

[Peter Crosthwaite]

On Mon, Nov 30, 2015 at 11:43 AM, Krzeminski, Marcin (Nokia -
PL/Wroclaw) <address@hidden> wrote:
>
>
>> -----Original Message-----
>> From: EXT Peter Crosthwaite [mailto:address@hidden
>> Sent: Monday, November 30, 2015 7:45 PM
>> To: Krzeminski, Marcin (Nokia - PL/Wroclaw)
>> Cc: address@hidden
>> Subject: Re: SPI EEPROM device model
>>
>> On Mon, Nov 30, 2015 at 12:53 AM, Krzeminski, Marcin (Nokia -
>> PL/Wroclaw) <address@hidden> wrote:
>> > Hello,
>> >
>> > I need to write some SPI eeprom device model (probably AT25128B or
>> AT93C56).
>> > I can not see any such device in qemu, but this time I want to ask
>> > before I start to implement, if something that can speed up work is already
>> present somewhere ?
>> > Maybe do you have some preferences which eeprom device is better to
>> have in qemu?
>> >
>>
>> So some of those EEPROM devices are nearly identical to M25P80 in
>> functionality, the main difference being that individual cells can be
>> programmed from 0 back to 1. A quick look at a AT25128B datasheet looks
>> like this may be the case. Read and write instructions as the same encoding
>> as M25P80.
>>
>> Search m25p80 for WR_1, which is a flag you can set that allows write of 1 to
>> individual bits. I think can become a feature of M25P80 (more table entries) 
>> if
>> the basic instructions are just an M25P80 subset.
>>
> The goal of my question was to be sure that there is no such device model 
> implemented somewhere.
> I target to extend M25P80 with some eeprom device, will see if this make 
> sense.
>

Ok not that I know of beyond the WR_1 support. When I did this, it was
as simple as a table entry with WR_1 to at least be good enough for
the task at hand.

Regards,
Peter

> Thanks,
> Marcin
>
>> HTH
>>
>> Regards,
>> Peter
>>
>> > Regards,
>> > Marcin