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[Qemu-devel] [RFC v6 11/14] softmmu: Simplify helper_*_st_name, wrap MM
From: |
Alvise Rigo |
Subject: |
[Qemu-devel] [RFC v6 11/14] softmmu: Simplify helper_*_st_name, wrap MMIO code |
Date: |
Mon, 14 Dec 2015 09:41:35 +0100 |
Attempting to simplify the helper_*_st_name, wrap the MMIO code into an
inline function.
Suggested-by: Jani Kokkonen <address@hidden>
Suggested-by: Claudio Fontana <address@hidden>
Signed-off-by: Alvise Rigo <address@hidden>
---
softmmu_template.h | 64 +++++++++++++++++++++++++++++++++++++-----------------
1 file changed, 44 insertions(+), 20 deletions(-)
diff --git a/softmmu_template.h b/softmmu_template.h
index 92f92b1..2ebf527 100644
--- a/softmmu_template.h
+++ b/softmmu_template.h
@@ -396,6 +396,26 @@ static inline void glue(helper_le_st_name,
_do_unl_access)(CPUArchState *env,
}
}
+static inline void glue(helper_le_st_name, _do_mmio_access)(CPUArchState *env,
+ DATA_TYPE val,
+ target_ulong addr,
+ TCGMemOpIdx oi,
+ unsigned mmu_idx,
+ int index,
+ uintptr_t retaddr)
+{
+ CPUIOTLBEntry *iotlbentry = &env->iotlb[mmu_idx][index];
+
+ if ((addr & (DATA_SIZE - 1)) != 0) {
+ glue(helper_le_st_name, _do_unl_access)(env, val, addr, mmu_idx,
+ oi, retaddr);
+ }
+ /* ??? Note that the io helpers always read data in the target
+ byte ordering. We should push the LE/BE request down into io. */
+ val = TGT_LE(val);
+ glue(io_write, SUFFIX)(env, iotlbentry, val, addr, retaddr);
+}
+
void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
TCGMemOpIdx oi, uintptr_t retaddr)
{
@@ -458,16 +478,8 @@ void helper_le_st_name(CPUArchState *env, target_ulong
addr, DATA_TYPE val,
return;
} else {
- if ((addr & (DATA_SIZE - 1)) != 0) {
- glue(helper_le_st_name, _do_unl_access)(env, val, addr,
mmu_idx,
- oi, retaddr);
- }
- iotlbentry = &env->iotlb[mmu_idx][index];
-
- /* ??? Note that the io helpers always read data in the target
- byte ordering. We should push the LE/BE request down into io.
*/
- val = TGT_LE(val);
- glue(io_write, SUFFIX)(env, iotlbentry, val, addr, retaddr);
+ glue(helper_le_st_name, _do_mmio_access)(env, val, addr, oi,
+ mmu_idx, index, retaddr);
return;
}
}
@@ -523,6 +535,26 @@ static inline void glue(helper_be_st_name,
_do_unl_access)(CPUArchState *env,
}
}
+static inline void glue(helper_be_st_name, _do_mmio_access)(CPUArchState *env,
+ DATA_TYPE val,
+ target_ulong addr,
+ TCGMemOpIdx oi,
+ unsigned mmu_idx,
+ int index,
+ uintptr_t retaddr)
+{
+ CPUIOTLBEntry *iotlbentry = &env->iotlb[mmu_idx][index];
+
+ if ((addr & (DATA_SIZE - 1)) != 0) {
+ glue(helper_be_st_name, _do_unl_access)(env, val, addr, mmu_idx,
+ oi, retaddr);
+ }
+ /* ??? Note that the io helpers always read data in the target
+ byte ordering. We should push the LE/BE request down into io. */
+ val = TGT_BE(val);
+ glue(io_write, SUFFIX)(env, iotlbentry, val, addr, retaddr);
+}
+
void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
TCGMemOpIdx oi, uintptr_t retaddr)
{
@@ -585,16 +617,8 @@ void helper_be_st_name(CPUArchState *env, target_ulong
addr, DATA_TYPE val,
return;
} else {
- if ((addr & (DATA_SIZE - 1)) != 0) {
- glue(helper_be_st_name, _do_unl_access)(env, val, addr,
mmu_idx,
- oi, retaddr);
- }
- iotlbentry = &env->iotlb[mmu_idx][index];
-
- /* ??? Note that the io helpers always read data in the target
- byte ordering. We should push the LE/BE request down into io.
*/
- val = TGT_BE(val);
- glue(io_write, SUFFIX)(env, iotlbentry, val, addr, retaddr);
+ glue(helper_be_st_name, _do_mmio_access)(env, val, addr, oi,
+ mmu_idx, index, retaddr);
return;
}
}
--
2.6.4
- [Qemu-devel] [RFC v6 04/14] softmmu: Add helpers for a new slowpath, (continued)
- [Qemu-devel] [RFC v6 04/14] softmmu: Add helpers for a new slowpath, Alvise Rigo, 2015/12/14
- [Qemu-devel] [RFC v6 05/14] tcg: Create new runtime helpers for excl accesses, Alvise Rigo, 2015/12/14
- [Qemu-devel] [RFC v6 01/14] exec.c: Add new exclusive bitmap to ram_list, Alvise Rigo, 2015/12/14
- [Qemu-devel] [RFC v6 08/14] target-arm: Add atomic_clear helper for CLREX insn, Alvise Rigo, 2015/12/14
- [Qemu-devel] [RFC v6 10/14] softmmu: Simplify helper_*_st_name, wrap unaligned code, Alvise Rigo, 2015/12/14
- [Qemu-devel] [RFC v6 07/14] target-arm: translate: Use ld/st excl for atomic insns, Alvise Rigo, 2015/12/14
- [Qemu-devel] [RFC v6 12/14] softmmu: Simplify helper_*_st_name, wrap RAM code, Alvise Rigo, 2015/12/14
- [Qemu-devel] [RFC v6 13/14] softmmu: Include MMIO/invalid exclusive accesses, Alvise Rigo, 2015/12/14
- [Qemu-devel] [RFC v6 14/14] softmmu: Protect MMIO exclusive range, Alvise Rigo, 2015/12/14
- [Qemu-devel] [RFC v6 11/14] softmmu: Simplify helper_*_st_name, wrap MMIO code,
Alvise Rigo <=
- [Qemu-devel] [RFC v6 09/14] softmmu: Add history of excl accesses, Alvise Rigo, 2015/12/14
- Re: [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction translation, Paolo Bonzini, 2015/12/14
Re: [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction translation, Andreas Tobler, 2015/12/14