[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 10/25] ARM: ACPI: Add power button device in ACPI DSD
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 10/25] ARM: ACPI: Add power button device in ACPI DSDT table |
Date: |
Thu, 17 Dec 2015 11:50:05 +0000 |
From: Shannon Zhao <address@hidden>
Add power button device in ACPI DSDT table.
Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Wei Huang <address@hidden>
Tested-by: Wei Huang <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/virt-acpi-build.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index fcc08f7..e5dc2d5 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -43,6 +43,7 @@
#include "hw/pci/pci.h"
#define ARM_SPI_BASE 32
+#define ACPI_POWER_BUTTON_DEVICE "PWRB"
typedef struct VirtAcpiCpuInfo {
DECLARE_BITMAP(found_cpus, VIRT_ACPI_CPU_ID_LIMIT);
@@ -341,6 +342,15 @@ static void acpi_dsdt_add_gpio(Aml *scope, const
MemMapEntry *gpio_memmap,
aml_append(scope, dev);
}
+static void acpi_dsdt_add_power_button(Aml *scope)
+{
+ Aml *dev = aml_device(ACPI_POWER_BUTTON_DEVICE);
+ aml_append(dev, aml_name_decl("_HID", aml_string("PNP0C0C")));
+ aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
+ aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+ aml_append(scope, dev);
+}
+
/* RSDP */
static GArray *
build_rsdp(GArray *rsdp_table, GArray *linker, unsigned rsdt)
@@ -559,6 +569,7 @@ build_dsdt(GArray *table_data, GArray *linker,
VirtGuestInfo *guest_info)
guest_info->use_highmem);
acpi_dsdt_add_gpio(scope, &memmap[VIRT_GPIO],
(irqmap[VIRT_GPIO] + ARM_SPI_BASE));
+ acpi_dsdt_add_power_button(scope);
aml_append(dsdt, scope);
--
1.9.1
- [Qemu-devel] [PULL 00/25] target-arm queue, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 05/25] target-arm: Fix and improve AA32 singlestep translation completion code, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 22/25] i.MX: Fix i.MX31 default/reset configuration, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 20/25] target-arm: kvm - re-inject guest debug exceptions, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 23/25] i.MX: rename i.MX CCM get_clock() function and CLK ID enum names, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 24/25] i.MX: Split the CCM class into an abstract base class and a concrete class, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 17/25] target-arm: kvm - implement software breakpoints, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 19/25] target-arm: kvm - add support for HW assisted debug, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 21/25] tests/guest-debug: introduce basic gdbstub tests, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 18/25] target-arm: kvm - support for single step, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 10/25] ARM: ACPI: Add power button device in ACPI DSDT table,
Peter Maydell <=
- [Qemu-devel] [PULL 15/25] ARM: Virt: Add gpio-keys node for Poweroff using DT, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 16/25] target-arm: kvm64 - introduce kvm_arm_init_debug(), Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 25/25] i.MX: Add an i.MX25 specific CCM class/instance, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 14/25] ARM: Virt: Add QEMU powerdown notifier and hook it to GPIO Pin 3, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 07/25] acpi: extend aml_interrupt() to support multiple irqs, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 12/25] ACPI: Add aml_gpio_int() wrapper for GPIO Interrupt Connection, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 08/25] ARM: Virt: Add a GPIO controller, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 03/25] arm: soc-dma: use hwaddr instead of target_ulong in printf, Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 01/25] i.MX: add support for lower and upper interrupt in GPIO., Peter Maydell, 2015/12/17
- [Qemu-devel] [PULL 04/25] target-arm: raise exception on misaligned LDREX operands, Peter Maydell, 2015/12/17