Re: [Qemu-devel] [PATCH 4/6] i.MX: Add i.MX6 System Reset Controller device.

[Peter Maydell]

On 6 February 2016 at 20:07, Jean-Christophe DUBOIS <address@hidden> wrote:
> Le 02/02/2016 17:46, Peter Maydell a écrit :
>>
>> On 26 January 2016 at 21:45, Jean-Christophe Dubois <address@hidden>
>> wrote:
>>> +static void imx6_src_reset(DeviceState *dev)
>>> +{
>>> +    IMX6SRCState *s = IMX6_SRC(dev);
>>> +
>>> +    DPRINTF("\n");
>>> +
>>> +    /*
>>> +     * We only clear the first registers as all GPR registers are
>>> preserved
>>> +     * over resets
>>> +     */
>>> +    memset(s->regs, 0, SRC_GPR1 * sizeof(uint32_t));
>>
>> Reset for a QEMU device means "full power cycle reset", so we should
>> return the state to the same as if QEMU had just been started.
>
>
> Is there any way to support the warm reset then?

If it's purely local to a device (triggered by a register
write), just write a function that does what it needs
to do. If you need a more machine-wide idea of "warm
reset" then things get harder.

>> This all looks pretty dangerous to me. Handling power-on of
>> another CPU needs careful thought, especially since we're moving
>> towards multi-threaded TCG, in which case the other CPU might
>> in thory be really running.
>
>
> In i.MX6 (and SOC using the SRC in general) all cores (except core 0
> obviously) are initialized in "powered-off" mode. Therefore they should not
> be running before this function is called.
>
> Basically this code is just an adaptation of a similar code in
> target-arm/psci.c.

Yeah, I realised that a bit after posting my earlier email.
We should factor out the code that's doing the actual work
of powering up a different CPU, because then if it does
need modification for multi-threading we only have one place
to fix.

thanks
-- PMM