Re: [Qemu-devel] [PATCH v2 7/9] i.MX: Add i.MX6 SOC implementation.

[Peter Maydell]

On 19 February 2016 at 06:32, Jean-Christophe DUBOIS
<address@hidden> wrote:
> If I set has_el3 to false, I can boot the 4 cores without problem. With
> has_el3 set to true (default value) I am getting the above behavior (boot OK
> in uniprocessor mode, and misbehaving if -smp >= 2).

I worked out why this happens -- it's because the secondary CPUs and
the primary disagree about whether they're booting in Secure mode.
You can either:
(1) have the board code say "boot the primary in Secure mode":
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -85,6 +85,7 @@ static void sabrelite_init(MachineState *machine)
     sabrelite_binfo.kernel_cmdline = machine->kernel_cmdline;
     sabrelite_binfo.initrd_filename = machine->initrd_filename;
     sabrelite_binfo.nb_cpus = smp_cpus;
+    sabrelite_binfo.secure_boot = true;
     sabrelite_binfo.write_secondary_boot = sabrelite_write_secondary;
     sabrelite_binfo.secondary_cpu_reset_hook = sabrelite_reset_secondary;

or (2) have the code in imx6_src.c tell the secondaries that
they should start in non-secure mode:

--- a/hw/misc/imx6_src.c
+++ b/hw/misc/imx6_src.c
@@ -144,6 +144,7 @@ static void imx6_src_cpu_on(uint32_t cpuid,
uint32_t entry, uint32_t context_id)

     target_cpu->env.regs[0] = context_id;
     target_cpu->env.thumb = entry & 1;
+    target_cpu->env.cp15.scr_el3 |= SCR_NS;

     target_cpu_class->set_pc(target_cpu_state, entry);
 }

If you do either of these then the system will boot the kernel that
you sent the link to.

To answer the question of "which of these is the correct thing to do"
we need to look at what the real hardware does when it's running Linux:
does it run Linux in Secure or Nonsecure?

thanks
-- PMM