Re: [Qemu-devel] [PATCH v4 09/11] block: m25p80: Implemented FSR register

[Peter Crosthwaite]

On Mon, Feb 22, 2016 at 12:03 AM,  <address@hidden> wrote:
> From: Marcin Krzeminski <address@hidden>
>
> Implements FSR register, it is used for busy waits.
>
> Signed-off-by: Marcin Krzeminski <address@hidden>
> ---
>  hw/block/m25p80.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
> index 4acc79a..bc0dadb 100644
> --- a/hw/block/m25p80.c
> +++ b/hw/block/m25p80.c
> @@ -222,6 +222,7 @@ typedef enum {
>      WREN = 0x6,
>      JEDEC_READ = 0x9f,
>      BULK_ERASE = 0xc7,
> +    READ_FSR = 0x70,
>
>      READ = 0x3,
>      READ4 = 0x13,
> @@ -678,6 +679,16 @@ static void decode_new_cmd(Flash *s, uint32_t value)
>          s->state = STATE_READING_DATA;
>          break;
>
> +    case READ_FSR:
> +        s->data[0] = (1 << 7); /*Indicates flash is ready */
> +        if (s->four_bytes_address_mode) {
> +            s->data[0] |= 0x1;
> +        }
> +        s->pos = 0;
> +        s->len = 1;
> +        s->state = STATE_READING_DATA;
> +        break;
> +

To be consistent with recommendation on CFG register macros it should
be done here too.

Otherwise:

Reviewed-by: Peter Crosthwaite <address@hidden>

>      case JEDEC_READ:
>          DB_PRINT_L(0, "populated jedec code\n");
>          s->data[0] = (s->pi->jedec >> 16) & 0xff;
> --
> 2.5.0
>