[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 02/52] target-m68k: Build the opcode table only once
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH 02/52] target-m68k: Build the opcode table only once to avoid multithreading issues |
Date: |
Wed, 4 May 2016 22:11:42 +0200 |
From: John Paul Adrian Glaubitz <address@hidden>
Signed-off-by: John Paul Adrian Glaubitz <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>
---
target-m68k/translate.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 301f687..e14e0fd 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -2833,6 +2833,11 @@ register_opcode (disas_proc proc, uint16_t opcode,
uint16_t mask)
Later insn override earlier ones. */
void register_m68k_insns (CPUM68KState *env)
{
+ /* Build the opcode table only once to avoid
+ multithreading issues. */
+ if (opcode_table[0] != NULL) {
+ return;
+ }
#define INSN(name, opcode, mask, feature) do { \
if (m68k_feature(env, M68K_FEATURE_##feature)) \
register_opcode(disas_##name, 0x##opcode, 0x##mask); \
--
2.5.5
- [Qemu-devel] [PATCH 00/52] 680x0 instructions emulation, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 01/52] target-m68k: fix DEBUG_DISPATCH, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 02/52] target-m68k: Build the opcode table only once to avoid multithreading issues,
Laurent Vivier <=
- [Qemu-devel] [PATCH 03/52] target-m68k: define m680x0 CPUs and features, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 04/52] target-m68k: manage scaled index, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 05/52] target-m68k: introduce read_imXX() functions, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 06/52] target-m68k: set disassembler mode to 680x0 or coldfire, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 07/52] target-m68k: add bkpt instruction, Laurent Vivier, 2016/05/04