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[Qemu-devel] [PATCH 30/52] target-m68k: add scc/dbcc
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH 30/52] target-m68k: add scc/dbcc |
Date: |
Wed, 4 May 2016 22:12:10 +0200 |
Signed-off-by: Laurent Vivier <address@hidden>
---
target-m68k/translate.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 5914185..cd656fe 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -1096,6 +1096,49 @@ static void gen_jmp_tb(DisasContext *s, int n, uint32_t
dest)
s->is_jmp = DISAS_TB_JUMP;
}
+DISAS_INSN(scc_mem)
+{
+ TCGLabel *l1;
+ int cond;
+ TCGv dest;
+
+ l1 = gen_new_label();
+ cond = (insn >> 8) & 0xf;
+ dest = tcg_temp_local_new();
+ tcg_gen_movi_i32(dest, 0);
+ gen_jmpcc(s, cond ^ 1, l1);
+ tcg_gen_movi_i32(dest, 0xff);
+ gen_set_label(l1);
+ DEST_EA(env, insn, OS_BYTE, dest, NULL);
+ tcg_temp_free(dest);
+}
+
+DISAS_INSN(dbcc)
+{
+ TCGLabel *l1;
+ TCGv reg;
+ TCGv tmp;
+ int16_t offset;
+ uint32_t base;
+
+ reg = DREG(insn, 0);
+ base = s->pc;
+ offset = (int16_t)read_im16(env, s);
+ l1 = gen_new_label();
+ gen_jmpcc(s, (insn >> 8) & 0xf, l1);
+
+ tmp = tcg_temp_new();
+ tcg_gen_ext16s_i32(tmp, reg);
+ tcg_gen_addi_i32(tmp, tmp, -1);
+ gen_partset_reg(OS_WORD, reg, tmp);
+ tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, -1, l1);
+ update_cc_op(s);
+ gen_jmp_tb(s, 1, base + offset);
+ gen_set_label(l1);
+ update_cc_op(s);
+ gen_jmp_tb(s, 0, s->pc);
+}
+
DISAS_INSN(undef_mac)
{
gen_exception(s, s->pc - 2, EXCP_LINEA);
@@ -3292,6 +3335,9 @@ void register_m68k_insns (CPUM68KState *env)
INSN(addsubq, 5000, f080, M68000);
INSN(addsubq, 5080, f0c0, M68000);
INSN(scc, 50c0, f0f8, CF_ISA_A);
+ INSN(scc_mem, 50c0, f0c0, M68000);
+ INSN(scc, 50c0, f0f8, M68000);
+ INSN(dbcc, 50c8, f0f8, M68000);
INSN(addsubq, 5080, f1c0, CF_ISA_A);
INSN(tpf, 51f8, fff8, CF_ISA_A);
--
2.5.5
- Re: [Qemu-devel] [PATCH 21/52] target-m68k: Reorg flags handling, (continued)
- [Qemu-devel] [PATCH 24/52] target-m68k: Optimize some comparisons, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 25/52] target-m68k: Optimize gen_flush_flags, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 26/52] target-m68k: Inline shifts, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 27/52] target-m68k: Inline addx, subx, negx, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 28/52] target-m68k: add addx/subx/negx ops, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 29/52] target-m68k: factorize flags computing, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 30/52] target-m68k: add scc/dbcc,
Laurent Vivier <=
- [Qemu-devel] [PATCH 31/52] target-m68k: some bit ops cleanup, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 32/52] target-m68k: bitfield ops, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 33/52] target-m68k: inline divu/divs, Laurent Vivier, 2016/05/04