[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v10 05/26] acpi: enable INTR for DMAR report structu
From: |
Peter Xu |
Subject: |
[Qemu-devel] [PATCH v10 05/26] acpi: enable INTR for DMAR report structure |
Date: |
Tue, 21 Jun 2016 15:47:33 +0800 |
In ACPI DMA remapping report structure, enable INTR flag when specified.
Signed-off-by: Peter Xu <address@hidden>
---
hw/i386/acpi-build.c | 11 ++++++++++-
include/hw/i386/intel_iommu.h | 2 ++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 161f089..961ccd6a 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -57,6 +57,7 @@
#include "qapi/qmp/qint.h"
#include "qom/qom-qobject.h"
+#include "hw/i386/x86-iommu.h"
/* These are used to size the ACPI tables for -M pc-i440fx-1.7 and
* -M pc-i440fx-2.0. Even if the actual amount of AML generated grows
@@ -2422,10 +2423,18 @@ build_dmar_q35(GArray *table_data, BIOSLinker *linker)
AcpiTableDmar *dmar;
AcpiDmarHardwareUnit *drhd;
+ uint8_t dmar_flags = 0;
+ X86IOMMUState *iommu = x86_iommu_get_default();
+
+ assert(iommu);
+ if (iommu->intr_supported) {
+ /* enable INTR for the IOMMU device */
+ dmar_flags |= DMAR_REPORT_F_INTR;
+ }
dmar = acpi_data_push(table_data, sizeof(*dmar));
dmar->host_address_width = VTD_HOST_ADDRESS_WIDTH - 1;
- dmar->flags = 0; /* No intr_remap for now */
+ dmar->flags = dmar_flags;
/* DMAR Remapping Hardware Unit Definition structure */
drhd = acpi_data_push(table_data, sizeof(*drhd));
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index e36b896..638d77f 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -44,6 +44,8 @@
#define VTD_HOST_ADDRESS_WIDTH 39
#define VTD_HAW_MASK ((1ULL << VTD_HOST_ADDRESS_WIDTH) - 1)
+#define DMAR_REPORT_F_INTR (1)
+
typedef struct VTDContextEntry VTDContextEntry;
typedef struct VTDContextCacheEntry VTDContextCacheEntry;
typedef struct IntelIOMMUState IntelIOMMUState;
--
2.4.11
- [Qemu-devel] [PATCH v10 00/26] IOMMU: Enable interrupt remapping for Intel IOMMU, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 01/26] x86-iommu: introduce parent class, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 02/26] x86-iommu: provide x86_iommu_get_default, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 04/26] x86-iommu: introduce "intremap" property, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 03/26] x86-iommu: q35: generalize find_add_as(), Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 05/26] acpi: enable INTR for DMAR report structure,
Peter Xu <=
- [Qemu-devel] [PATCH v10 06/26] intel_iommu: allow queued invalidation for IR, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 07/26] intel_iommu: set IR bit for ECAP register, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 08/26] acpi: add DMAR scope definition for root IOAPIC, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 09/26] intel_iommu: define interrupt remap table addr register, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 10/26] intel_iommu: handle interrupt remap enable, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 11/26] intel_iommu: define several structs for IOMMU IR, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 12/26] intel_iommu: add IR translation faults defines, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 13/26] intel_iommu: Add support for PCI MSI remap, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 14/26] q35: ioapic: add support for emulated IOAPIC IR, Peter Xu, 2016/06/21
- [Qemu-devel] [PATCH v10 15/26] ioapic: introduce ioapic_entry_parse() helper, Peter Xu, 2016/06/21