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[Qemu-devel] [PULL 13/32] ICH9 LPC: handle GSI as qdev GPIO
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 13/32] ICH9 LPC: handle GSI as qdev GPIO |
Date: |
Tue, 28 Jun 2016 19:33:43 +0200 |
From: Efimov Vasily <address@hidden>
The ICH9 LPC bridge has 24 output IRQs connected to GSI. Currently the IRQs are
referenced by pointers. The pointers are initialized at startup by direct access
to the structure fields. This violates Qemu device model.
The patch makes the IRQs handling to use GPIO model.
Signed-off-by: Efimov Vasily <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
hw/i386/pc_q35.c | 6 +++++-
hw/isa/lpc_ich9.c | 3 +++
include/hw/i386/ich9.h | 4 +++-
3 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 6e296c0..17634dd 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -60,6 +60,7 @@ static void pc_q35_init(MachineState *machine)
PCIHostState *phb;
PCIBus *host_bus;
PCIDevice *lpc;
+ DeviceState *lpc_dev;
BusState *idebus[MAX_SATA_PORTS];
ISADevice *rtc_state;
MemoryRegion *system_io = get_system_io();
@@ -190,7 +191,10 @@ static void pc_q35_init(MachineState *machine)
PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
ich9_lpc = ICH9_LPC_DEVICE(lpc);
- ich9_lpc->gsi = gsi;
+ lpc_dev = DEVICE(lpc);
+ for (i = 0; i < GSI_NUM_PINS; i++) {
+ qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, gsi[i]);
+ }
pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
ICH9_LPC_NB_PIRQS);
pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 3bdb78d..59f15a1 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -599,6 +599,7 @@ static void ich9_lpc_initfn(Object *obj)
static void ich9_lpc_realize(PCIDevice *d, Error **errp)
{
ICH9LPCState *lpc = ICH9_LPC_DEVICE(d);
+ DeviceState *dev = DEVICE(d);
ISABus *isa_bus;
isa_bus = isa_bus_new(DEVICE(d), get_system_memory(), get_system_io(),
@@ -626,6 +627,8 @@ static void ich9_lpc_realize(PCIDevice *d, Error **errp)
memory_region_add_subregion_overlap(pci_address_space_io(d),
ICH9_RST_CNT_IOPORT, &lpc->rst_cnt_mem,
1);
+
+ qdev_init_gpio_out_named(dev, lpc->gsi, ICH9_GPIO_GSI, GSI_NUM_PINS);
}
static bool ich9_rst_cnt_needed(void *opaque)
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index a09a445..c14490b 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -68,7 +68,7 @@ typedef struct ICH9LPCState {
MemoryRegion rcrb_mem; /* root complex register block */
Notifier machine_ready;
- qemu_irq *gsi;
+ qemu_irq gsi[GSI_NUM_PINS];
} ICH9LPCState;
Object *ich9_lpc_find(void);
@@ -176,6 +176,8 @@ Object *ich9_lpc_find(void);
#define ICH9_LPC_PIC_NUM_PINS 16
#define ICH9_LPC_IOAPIC_NUM_PINS 24
+#define ICH9_GPIO_GSI "gsi"
+
/* D31:F2 SATA Controller #1 */
#define ICH9_SATA1_DEV 31
#define ICH9_SATA1_FUNC 2
--
2.7.4
- [Qemu-devel] [PULL 03/32] vmport: identify vmport type by macro TYPE_VMPORT, (continued)
- [Qemu-devel] [PULL 03/32] vmport: identify vmport type by macro TYPE_VMPORT, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 05/32] Q35: implement property interfece to several parameters, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 06/32] pc_q35: configure Q35 instance using properties, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 04/32] pflash: make TYPE_CFI_PFLASH0{1, 2} macros public, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 07/32] pckbd: handle A20 IRQ as GPIO, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 08/32] port92: handle A20 IRQ as GPIO, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 09/32] ICH9 SMB: make TYPE_ICH9_SMB_DEVICE macro public, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 11/32] ich9: clean up ich9_lpc_update_pic/ich9_lpc_update_apic and callers, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 12/32] ich9: unify pic and ioapic IRQ vectors, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 10/32] ich9: call ich9_lpc_update_pic for disabled pirqs, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 13/32] ICH9 LPC: handle GSI as qdev GPIO,
Paolo Bonzini <=
- [Qemu-devel] [PULL 14/32] ICH9 LPC: move call of isa_bus_irqs to 'realize' method, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 16/32] MC146818 RTC: add GPIO access to output IRQ, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 15/32] isa: introduce wrapper isa_connect_gpio_out, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 17/32] scsi: esp: fix migration, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 18/32] vnc: generalize "VNC server running on ..." message, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 19/32] pci-assign: Move "Invalid ROM" error message to pci-assign-load-rom.c, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 21/32] char: clean up remaining chardevs when leaving, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 22/32] socket: add listen feature, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 23/32] socket: unlink unix socket on remove, Paolo Bonzini, 2016/06/28
- [Qemu-devel] [PULL 24/32] iscsi: fix assertion in is_sector_request_lun_aligned, Paolo Bonzini, 2016/06/28