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Re: [Qemu-devel] [PATCH v4 2/5] x86: Allow physical address bits to be s
From: |
Eduardo Habkost |
Subject: |
Re: [Qemu-devel] [PATCH v4 2/5] x86: Allow physical address bits to be set |
Date: |
Fri, 8 Jul 2016 23:36:32 -0300 |
User-agent: |
Mutt/1.6.1 (2016-04-27) |
On Fri, Jul 08, 2016 at 05:59:16PM -0700, Richard Henderson wrote:
> On 07/08/2016 04:36 PM, Eduardo Habkost wrote:
> > -#elif defined(TARGET_X86_64)
> > -#define TARGET_PHYS_ADDR_SPACE_BITS 42
> > -#elif defined(TARGET_I386)
> > -#define TARGET_PHYS_ADDR_SPACE_BITS 36
> > [...]
> > --- a/target-i386/cpu.h
> > +++ b/target-i386/cpu.h
> > [...]
> > +#ifdef TARGET_X86_64
> > +#define TARGET_PHYS_ADDR_SPACE_BITS 52
> > +/* ??? This is really 48 bits, sign-extended, but the only thing
> > + accessible to userland with bit 48 set is the VSYSCALL, and that
> > + is handled via other mechanisms. */
> > +#define TARGET_VIRT_ADDR_SPACE_BITS 47
> > +#else
> > +#define TARGET_PHYS_ADDR_SPACE_BITS 36
> > +#define TARGET_VIRT_ADDR_SPACE_BITS 32
> > +#endif
> > +
> >
> > But I really don't understand why it was changed to 52 when the
> > macros were moved. A (fortunate) typo?
>
> It was 6 years ago, but I assume that I looked up 52 as a theoretical
> maximum. I'm not going to look it up again to verify though.
Probably that's the case. David Gilbert also found 52 to be the
maximum.
--
Eduardo
[Qemu-devel] [PATCH v4 3/5] x86: Mask mtrr mask based on CPU physical address limits, Dr. David Alan Gilbert (git), 2016/07/08
[Qemu-devel] [PATCH v4 4/5] x86: fill high bits of mtrr mask, Dr. David Alan Gilbert (git), 2016/07/08
[Qemu-devel] [PATCH v4 5/5] x86: Set physical address bits based on host, Dr. David Alan Gilbert (git), 2016/07/08