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Re: [Qemu-devel] [PATCH] ppc: Fix support for odd MSR combinations


From: Benjamin Herrenschmidt
Subject: Re: [Qemu-devel] [PATCH] ppc: Fix support for odd MSR combinations
Date: Sat, 09 Jul 2016 13:40:03 +1000

On Sat, 2016-07-09 at 13:22 +1000, Benjamin Herrenschmidt wrote:
> MacOS uses an architecturally illegal MSR combination that
> seems nonetheless supported by 32-bit processors, which is
> to have MSR[PR]=1 and one or more of MSR[DR/IR/EE]=0.
> 
> This adds support for it. To work properly we need to also
> properly include support for PR=1,{I,D}R=0 to the MMU index
> used by the qemu TLB.
> 
> Signed-off-by: Benjamin Herrenschmidt <address@hidden>
> ---

Oopps, little bug, v2 on its way:
+ 
   if ((env->flags & PPC_64B) && ((value >> MSR_PR) & 1)) {

This should be insns_flags

>          value |= (1 << MSR_EE) | (1 << MSR_DR) | (1 << MSR_IR);
>      }
>  #endif



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