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Re: [Qemu-devel] [PATCH] target-arm: Add missed AArch32 TLBI sytem regis
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-devel] [PATCH] target-arm: Add missed AArch32 TLBI sytem registers |
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Date: |
Mon, 11 Jul 2016 20:25:58 +0100 |
On 11 July 2016 at 19:47, Sergey Sorokin <address@hidden> wrote:
[re TLBIALLNSNH and TLBIALLNSNHIS]
> Table G4-25 Effect of the TLB maintenance instructions says:
> b. Available only in an implementation that includes EL2.
>
> So seems they should be in el2_cp_reginfo which is exist regardless EL3
> enabled.
> And also I need to fix tlbiall_nsnh_[is_]write functions accordingly.
Ah, yes. I was looking at the register description, which doesn't
mention that it's an EL2-only operation. el2_cp_reginfo is the right
place, then.
thanks
-- PMM