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[Qemu-devel] [PULL v3 04/55] hw/mips: fix PCI bus initialization
From: |
Michael S. Tsirkin |
Subject: |
[Qemu-devel] [PULL v3 04/55] hw/mips: fix PCI bus initialization |
Date: |
Wed, 20 Jul 2016 20:44:25 +0300 |
From: Marcel Apfelbaum <address@hidden>
Delay the host-bridge 'realization' until the
PCI root bus is attached.
Signed-off-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Tested-by: Mark Cave-Ayland <address@hidden>
Acked-by: Leon Alrae <address@hidden>
Tested-by: Leon Alrae <address@hidden>
---
hw/mips/gt64xxx_pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c
index 3f4523d..4811843 100644
--- a/hw/mips/gt64xxx_pci.c
+++ b/hw/mips/gt64xxx_pci.c
@@ -1167,7 +1167,6 @@ PCIBus *gt64120_register(qemu_irq *pic)
DeviceState *dev;
dev = qdev_create(NULL, TYPE_GT64120_PCI_HOST_BRIDGE);
- qdev_init_nofail(dev);
d = GT64120_PCI_HOST_BRIDGE(dev);
phb = PCI_HOST_BRIDGE(dev);
memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", UINT32_MAX);
@@ -1178,6 +1177,7 @@ PCIBus *gt64120_register(qemu_irq *pic)
&d->pci0_mem,
get_system_io(),
PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS);
+ qdev_init_nofail(dev);
memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d,
"isd-mem", 0x1000);
pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci");
--
MST
- [Qemu-devel] [PULL v3 00/55] pc, pci, virtio: new features, cleanups, fixes, Michael S. Tsirkin, 2016/07/20
- [Qemu-devel] [PULL v3 01/55] nvdimm: fix memory leak in error code path, Michael S. Tsirkin, 2016/07/20
- [Qemu-devel] [PULL v3 02/55] tests/prom-env-test: increase the test timeout, Michael S. Tsirkin, 2016/07/20
- [Qemu-devel] [PULL v3 03/55] hw/alpha: fix PCI bus initialization, Michael S. Tsirkin, 2016/07/20
- [Qemu-devel] [PULL v3 04/55] hw/mips: fix PCI bus initialization,
Michael S. Tsirkin <=
- [Qemu-devel] [PULL v3 05/55] hw/apb: fix PCI bus initialization, Michael S. Tsirkin, 2016/07/20
- [Qemu-devel] [PULL v3 06/55] hw/grackle: fix PCI bus initialization, Michael S. Tsirkin, 2016/07/20
- [Qemu-devel] [PULL v3 07/55] hw/prep: realize the PCI root bus as part of the prep init, Michael S. Tsirkin, 2016/07/20
- [Qemu-devel] [PULL v3 09/55] x86-iommu: introduce parent class, Michael S. Tsirkin, 2016/07/20
- [Qemu-devel] [PULL v3 08/55] hw/versatile: realize the PCI root bus as part of the versatile init, Michael S. Tsirkin, 2016/07/20
- [Qemu-devel] [PULL v3 10/55] intel_iommu: rename VTD_PCI_DEVFN_MAX to x86-iommu, Michael S. Tsirkin, 2016/07/20
- [Qemu-devel] [PULL v3 11/55] x86-iommu: provide x86_iommu_get_default, Michael S. Tsirkin, 2016/07/20
- [Qemu-devel] [PULL v3 12/55] x86-iommu: introduce "intremap" property, Michael S. Tsirkin, 2016/07/20
- [Qemu-devel] [PULL v3 13/55] acpi: enable INTR for DMAR report structure, Michael S. Tsirkin, 2016/07/20
- [Qemu-devel] [PULL v3 14/55] intel_iommu: allow queued invalidation for IR, Michael S. Tsirkin, 2016/07/20