Re: [Qemu-devel] [PULL v5 29/57] intel_iommu: add SID validation for IR

[David Kiarie]

On Mon, Aug 8, 2016 at 12:06 PM, Peter Xu <address@hidden> wrote:

> On Tue, Aug 02, 2016 at 03:17:20PM +0300, David Kiarie wrote:
> > On Tue, Aug 2, 2016 at 3:12 PM, Peter Xu <address@hidden> wrote:
> >
> > > On Tue, Aug 02, 2016 at 02:58:55PM +0300, David Kiarie wrote:
> > > > > Sure. David, so do you like to do it or I cook this patch? :)
> > > >
> > > > If there are no objections I will look at this employing Jan's
> approach:
> > > > associating a write with an address space.
> > >
> > > Do you mean to translate current stl_le_phys() into something like
> > > address_space_stl_le(), with MemTxAttrs? (in ioapic_service())
> > >
> >
> > I tried doing something like that but the write gets discarded
> somewhere. I
> > don't see the write from IOMMU side.
>
> Hi, Jan, David,
>
> Sorry to respond late, but what's the version of your guest kernel? I
> suspect there is bug in guest IOMMU codes with IR on EOI handling, and
> maybe you can try to boost IOAPIC version to 0x20 when with old
> kernels using "-global ioapic.version=0x20".
>

I'm using mainline 4.7 kernel. I haven't experience any issue yet.


>
> Thanks,
>
> -- peterx
>