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Re: [Qemu-devel] [PATCH 2/2] intel-iommu: restrict EIM to quirkless KVM


From: Peter Xu
Subject: Re: [Qemu-devel] [PATCH 2/2] intel-iommu: restrict EIM to quirkless KVM
Date: Wed, 10 Aug 2016 11:29:46 +0800
User-agent: Mutt/1.5.24 (2015-08-30)

On Tue, Aug 09, 2016 at 05:03:33PM +0200, Radim Krčmář wrote:
> APIC in QEMU doesn't support x2APIC so exposing EIM is pointless and KVM
> has a quirk that needs to be disabled unless we want x2APIC message with
> destination 0xff to be misinterpreted as a broadcast.
> 
> Signed-off-by: Radim Krčmář <address@hidden>
> ---
>  hw/i386/intel_iommu.c  | 10 +++++++++-
>  target-i386/kvm-stub.c |  5 +++++
>  target-i386/kvm.c      | 12 ++++++++++++
>  target-i386/kvm_i386.h |  1 +
>  4 files changed, 27 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 28c31a2cdfa3..733751923233 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -31,6 +31,7 @@
>  #include "hw/i386/x86-iommu.h"
>  #include "hw/pci-host/q35.h"
>  #include "sysemu/kvm.h"
> +#include "kvm_i386.h"
>  
>  /*#define DEBUG_INTEL_IOMMU*/
>  #ifdef DEBUG_INTEL_IOMMU
> @@ -2364,7 +2365,14 @@ static void vtd_init(IntelIOMMUState *s)
>      s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO;
>  
>      if (x86_iommu->intr_supported) {
> -        s->ecap |= VTD_ECAP_IR | VTD_ECAP_EIM | VTD_ECAP_MHMV;
> +        s->ecap |= VTD_ECAP_IR | VTD_ECAP_MHMV;
> +        /* QEMU APIC does not support x2APIC and KVM does not work well 
> without
> +         * disabling a quirk.  IOMMU is unmigratable so we unconditionally 
> use
> +         * optional KVM features.
> +         */
> +        if (kvm_irqchip_in_kernel() && kvm_disable_x2apic_broadcast_quirk()) 
> {
> +            s->ecap |= VTD_ECAP_EIM;
> +        }

Good to me if this patch is only going to disable x2apic when we
failed to disable the x2apic broadcast quirk in KVM.

Question: still not too clear about how KVM treats the case when
x2apic and xapic are used in a single VM. E.g., if dest_id of an
interrupt is 0xff from a peripheral device, how should I know this is
a x2apic broadcast to 0-7 cpu in cluster 0, or an apic broadcast to
all?

Thanks,

-- peterx



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