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Re: [Qemu-devel] [PULL v2 0/4] target-arm queue
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-devel] [PULL v2 0/4] target-arm queue |
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Date: |
Fri, 9 Sep 2016 11:33:39 +0100 |
On 9 September 2016 at 07:50, Cédric Le Goater <address@hidden> wrote:
> Hello Peter,
>
> I have a little patchset fixing what you have asked for
> regarding the RAM setting in Aspeed, but it depends on
> the ast2500. So I suppose I should wait for the next
> merge before sending ?
I dropped those patches, so you'll need to respin them
anyway. You can include the ram setting stuff in that
patchset (squashed in or as an extra patch as you see fit).
thanks
-- PMM
- [Qemu-devel] [PULL v2 0/4] target-arm queue, Peter Maydell, 2016/09/06
- [Qemu-devel] [PULL 3/4] ARM: ACPI: fix the AML ID format for CPU devices, Peter Maydell, 2016/09/06
- [Qemu-devel] [PULL 1/4] ast2400: add a memory controller device model, Peter Maydell, 2016/09/06
- [Qemu-devel] [PULL 4/4] block: m25p80: Fix vmstate structure name, Peter Maydell, 2016/09/06
- [Qemu-devel] [PULL 2/4] target-arm: Fix lpae bit in FSR on an alignment fault, Peter Maydell, 2016/09/06
- Re: [Qemu-devel] [PULL v2 0/4] target-arm queue, Peter Maydell, 2016/09/08