[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 43/44] linux-user: ppc64: fix ARCH_206 bit in AT_HWCA
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 43/44] linux-user: ppc64: fix ARCH_206 bit in AT_HWCAP |
Date: |
Thu, 22 Sep 2016 16:37:41 +1000 |
From: Michael Walle <address@hidden>
Only the POWER[789] CPUs should have the ARCH_206 bit set. This is what the
linux kernel does. I guess this was also the intention of commit 0e019746.
We have to make sure all *206 bits are set.
Before this patch, the flags check in the GET_FEATURES2 macro returned true
if _any_ bit was set. This worked well as long as there was only one bit
set in the 'flag' parameter. But as explained before, we have to make sure
all bits in the 'flag' parameter are set.
Signed-off-by: Michael Walle <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
linux-user/elfload.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 29455e4..b70f504 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -741,8 +741,12 @@ static uint32_t get_elf_hwcap(void)
Altivec/FP/SPE support. Anything else is just a bonus. */
#define GET_FEATURE(flag, feature) \
do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0)
-#define GET_FEATURE2(flag, feature) \
- do { if (cpu->env.insns_flags2 & flag) { features |= feature; } } while (0)
+#define GET_FEATURE2(flags, feature) \
+ do { \
+ if ((cpu->env.insns_flags2 & flags) == flags) { \
+ features |= feature; \
+ } \
+ } while (0)
GET_FEATURE(PPC_64B, QEMU_PPC_FEATURE_64);
GET_FEATURE(PPC_FLOAT, QEMU_PPC_FEATURE_HAS_FPU);
GET_FEATURE(PPC_ALTIVEC, QEMU_PPC_FEATURE_HAS_ALTIVEC);
--
2.7.4
- [Qemu-devel] [PULL 39/44] Enable H_CLEAR_MOD and H_CLEAR_REF hypercalls on KVM/PPC64., (continued)
- [Qemu-devel] [PULL 39/44] Enable H_CLEAR_MOD and H_CLEAR_REF hypercalls on KVM/PPC64., David Gibson, 2016/09/22
- [Qemu-devel] [PULL 31/44] target-ppc: add xxspltib instruction, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 14/44] adb.c: add support for QKeyCode, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 27/44] target-ppc: convert st[16, 32, 64]r to use new macro, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 17/44] spapr_drc: convert to trace framework instead of DPRINTF, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 25/44] target-ppc: consolidate store operations, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 32/44] target-ppc: add lxsi[bw]zx instruction, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 24/44] target-ppc: convert ld[16, 32, 64]ur to use new macro, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 21/44] spapr_vscsi: convert to trace framework instead of DPRINTF, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 26/44] target-ppc: convert st64 to use new macro, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 43/44] linux-user: ppc64: fix ARCH_206 bit in AT_HWCAP,
David Gibson <=
- [Qemu-devel] [PULL 29/44] target-ppc: move out stqcx impementation, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 35/44] spapr: Introduce sPAPRCPUCoreClass, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 36/44] target-ppc: add TLB_NEED_LOCAL_FLUSH flag, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 33/44] target-ppc: add stxsi[bh]x instruction, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 42/44] ppc/kvm: Mark 64kB page size support as disabled if not available, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 41/44] ppc/xics: An ICS with offset 0 is assumed to be uninitialized, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 03/44] target-ppc: add vector insert instructions, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 38/44] target-ppc: tlbie/tlbivax should have global effect, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 23/44] target-ppc: convert ld64 to use new macro, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 37/44] target-ppc: add flag in check_tlb_flush(), David Gibson, 2016/09/22