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[Qemu-devel] [PULL 1/9] target-mips: add 24KEc CPU definition
From: |
Leon Alrae |
Subject: |
[Qemu-devel] [PULL 1/9] target-mips: add 24KEc CPU definition |
Date: |
Fri, 23 Sep 2016 08:20:02 +0100 |
From: André Draszik <address@hidden>
Define a new CPU definition supporting 24KEc cores, similar to
the existing 24Kc, but with added support for DSP instructions
and MIPS16e (and without FPU).
Signed-off-by: André Draszik <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
---
target-mips/translate_init.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index 39ed5c4..6ae23e4 100644
--- a/target-mips/translate_init.c
+++ b/target-mips/translate_init.c
@@ -256,6 +256,28 @@ static const mips_def_t mips_defs[] =
.mmu_type = MMU_TYPE_R4000,
},
{
+ .name = "24KEc",
+ .CP0_PRid = 0x00019600,
+ .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
+ (MMU_TYPE_R4000 << CP0C0_MT),
+ .CP0_Config1 = MIPS_CONFIG1 | (15 << CP0C1_MMU) |
+ (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
+ (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA) |
+ (1 << CP0C1_CA),
+ .CP0_Config2 = MIPS_CONFIG2,
+ .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSPP) | (0 << CP0C3_VInt),
+ .CP0_LLAddr_rw_bitmask = 0,
+ .CP0_LLAddr_shift = 4,
+ .SYNCI_Step = 32,
+ .CCRes = 2,
+ /* we have a DSP, but no FPU */
+ .CP0_Status_rw_bitmask = 0x1378FF1F,
+ .SEGBITS = 32,
+ .PABITS = 32,
+ .insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP,
+ .mmu_type = MMU_TYPE_R4000,
+ },
+ {
.name = "24Kf",
.CP0_PRid = 0x00019300,
.CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
--
2.7.4
- [Qemu-devel] [PULL 0/9] target-mips queue, Leon Alrae, 2016/09/23
- [Qemu-devel] [PULL 1/9] target-mips: add 24KEc CPU definition,
Leon Alrae <=
- [Qemu-devel] [PULL 2/9] target-mips: generate fences, Leon Alrae, 2016/09/23
- [Qemu-devel] [PULL 3/9] linux-user: Fix TARGET_SIOCATMARK definition for Mips, Leon Alrae, 2016/09/23
- [Qemu-devel] [PULL 4/9] linux-user: Fix TARGET_F_GETOWN definition for Mips, Leon Alrae, 2016/09/23
- [Qemu-devel] [PULL 5/9] linux-user: Fix structure target_flock definition for Mips, Leon Alrae, 2016/09/23
- [Qemu-devel] [PULL 6/9] linux-user: Fix structure target_semid64_ds definition for Mips, Leon Alrae, 2016/09/23
- [Qemu-devel] [PULL 7/9] linux-user: Fix certain argument alignment cases for Mips64, Leon Alrae, 2016/09/23
- [Qemu-devel] [PULL 9/9] linux-user: Add missing Mips syscalls items in strace.list, Leon Alrae, 2016/09/23
- [Qemu-devel] [PULL 8/9] linux-user: Add missing TARGET_EDQUOT error code for Mips, Leon Alrae, 2016/09/23
- Re: [Qemu-devel] [PULL 0/9] target-mips queue, Peter Maydell, 2016/09/23