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Re: [Qemu-devel] [Qemu-ppc] [PATCH v4 0/9] POWER9 TCG enablements - part


From: Nikunj A Dadhania
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH v4 0/9] POWER9 TCG enablements - part4
Date: Wed, 28 Sep 2016 17:04:12 +0530
User-agent: Notmuch/0.21 (https://notmuchmail.org) Emacs/25.0.94.1 (x86_64-redhat-linux-gnu)

Thomas Huth <address@hidden> writes:

> On 28.09.2016 07:31, Nikunj A Dadhania wrote:
>> This series contains 7 new instructions for POWER9 ISA3.0
>> Use newer qemu load/store tcg helpers and optimize stxvw4x and lxvw4x.
>> 
>> GCC was adding epilogue for every VSX instructions causing change in 
>> behaviour. For testing the load vector instructions used mfvsrld/mfvsrd 
>> for loading vsr to register. And for testing store vector, used mtvsrdd 
>> instructions. This helped in getting rid of the epilogue added by gcc. Tried 
>> adding the test cases to kvm-unit-tests, but executing vsx instructions 
>> results in cpu exception. Will debug that later. I will send the test code 
>> and steps to execute as reply to this email.
>
> Did you enable the VEC bit in the MSR before trying to run your
> instruction in a kvm-unit-test? If not, that might be the cause.

Yes, that did the trick, thanks :-)

> Alternatively, there is also a tests/tcg/ folder in QEMU ... you could
> add a tests/tcg/ppc64 subfolder there.

Haven't looked at it yet.

Regards
Nikunj




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