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Re: [Qemu-devel] [PATCH] target-arm/translate.c: fix movs pc, lr excepti


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH] target-arm/translate.c: fix movs pc, lr exception return on ARMv7
Date: Fri, 14 Oct 2016 18:50:05 +0100

On 14 October 2016 at 16:13, Alex Bennée <address@hidden> wrote:
> I suspect we need to audit all calls to store_reg that might involve the
> PC to ensure "interworking" branches are correctly handled. Also I'm not
> quite sure how the code worked before 9b6a3e as the store_reg path
> wouldn't have triggered the store_cpu_field(var, thumb) to set the
> processor mode back to thumb.

The answer to this question, incidentally, is that
the thumb bit is in the SPSR we're restoring, not in
the low bit of the PC value, and it gets written by
gen_helper_cpsr_write_eret().

thanks
-- PMM



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