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[Qemu-devel] [PATCH v2 07/15] target-sparc: Implement ldstub_asi inline
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v2 07/15] target-sparc: Implement ldstub_asi inline |
Date: |
Tue, 18 Oct 2016 19:34:22 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
target-sparc/translate.c | 52 +++++++++++++++++++-----------------------------
1 file changed, 21 insertions(+), 31 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 8cd8bb6..8d879a9 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -2013,6 +2013,20 @@ static void gen_swap(DisasContext *dc, TCGv dst, TCGv
src,
tcg_temp_free(t0);
}
+static void gen_ldstub(DisasContext *dc, TCGv dst, TCGv addr, int mmu_idx)
+{
+ /* ??? Should be atomic. */
+ TCGv_i32 t0 = tcg_temp_new_i32();
+ TCGv_i32 t1 = tcg_const_i32(0xff);
+
+ gen_address_mask(dc, addr);
+ tcg_gen_qemu_ld_i32(t0, addr, mmu_idx, MO_UB);
+ tcg_gen_qemu_st_i32(t1, addr, mmu_idx, MO_UB);
+ tcg_gen_extu_i32_tl(dst, t0);
+ tcg_temp_free_i32(t0);
+ tcg_temp_free_i32(t1);
+}
+
/* asi moves */
#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
typedef enum {
@@ -2351,25 +2365,12 @@ static void gen_ldstub_asi(DisasContext *dc, TCGv dst,
TCGv addr, int insn)
switch (da.type) {
case GET_ASI_EXCP:
break;
+ case GET_ASI_DIRECT:
+ gen_ldstub(dc, dst, addr, da.mem_idx);
+ break;
default:
- {
- TCGv_i32 r_asi = tcg_const_i32(da.asi);
- TCGv_i32 r_mop = tcg_const_i32(MO_UB);
- TCGv_i64 s64, t64;
-
- save_state(dc);
- t64 = tcg_temp_new_i64();
- gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_mop);
-
- s64 = tcg_const_i64(0xff);
- gen_helper_st_asi(cpu_env, addr, s64, r_asi, r_mop);
- tcg_temp_free_i64(s64);
- tcg_temp_free_i32(r_mop);
- tcg_temp_free_i32(r_asi);
-
- tcg_gen_trunc_i64_tl(dst, t64);
- tcg_temp_free_i64(t64);
- }
+ /* ??? Should be DAE_invalid_asi. */
+ gen_exception(dc, TT_DATA_ACCESS);
break;
}
}
@@ -5189,19 +5190,8 @@ static void disas_sparc_insn(DisasContext * dc, unsigned
int insn)
gen_address_mask(dc, cpu_addr);
tcg_gen_qemu_ld16s(cpu_val, cpu_addr, dc->mem_idx);
break;
- case 0xd: /* ldstub -- XXX: should be atomically */
- {
- TCGv r_const;
- TCGv tmp = tcg_temp_new();
-
- gen_address_mask(dc, cpu_addr);
- tcg_gen_qemu_ld8u(tmp, cpu_addr, dc->mem_idx);
- r_const = tcg_const_tl(0xff);
- tcg_gen_qemu_st8(r_const, cpu_addr, dc->mem_idx);
- tcg_gen_mov_tl(cpu_val, tmp);
- tcg_temp_free(r_const);
- tcg_temp_free(tmp);
- }
+ case 0xd: /* ldstub */
+ gen_ldstub(dc, cpu_val, cpu_addr, dc->mem_idx);
break;
case 0x0f:
/* swap, swap register with memory. Also atomically */
--
2.7.4
- [Qemu-devel] [PATCH v2 00/15] target-sparc improvements, Richard Henderson, 2016/10/18
- [Qemu-devel] [PATCH v2 01/15] target-sparc: Use overalignment flags for twinx and block asis, Richard Henderson, 2016/10/18
- [Qemu-devel] [PATCH v2 03/15] target-sparc: Add MMU_PHYS_IDX, Richard Henderson, 2016/10/18
- [Qemu-devel] [PATCH v2 05/15] target-sparc: Handle more twinx asis, Richard Henderson, 2016/10/18
- [Qemu-devel] [PATCH v2 02/15] target-sparc: Introduce cpu_raise_exception_ra, Richard Henderson, 2016/10/18
- [Qemu-devel] [PATCH v2 04/15] target-sparc: Use MMU_PHYS_IDX for bypass asis, Richard Henderson, 2016/10/18
- [Qemu-devel] [PATCH v2 06/15] target-sparc: Implement swap_asi inline, Richard Henderson, 2016/10/18
- [Qemu-devel] [PATCH v2 07/15] target-sparc: Implement ldstub_asi inline,
Richard Henderson <=
- [Qemu-devel] [PATCH v2 09/15] target-sparc: Implement BCOPY/BFILL inline, Richard Henderson, 2016/10/18
- [Qemu-devel] [PATCH v2 08/15] target-sparc: Implement cas_asi/casx_asi inline, Richard Henderson, 2016/10/18
- [Qemu-devel] [PATCH v2 12/15] target-sparc: Allow 4-byte alignment on fp mem ops, Richard Henderson, 2016/10/18
- [Qemu-devel] [PATCH v2 15/15] target-sparc: Use tcg_gen_atomic_cmpxchg_tl, Richard Henderson, 2016/10/18
- [Qemu-devel] [PATCH v2 10/15] target-sparc: Remove asi helper code handled inline, Richard Henderson, 2016/10/18
- [Qemu-devel] [PATCH v2 13/15] target-sparc: Remove MMU_MODE*_SUFFIX, Richard Henderson, 2016/10/18
- [Qemu-devel] [PATCH v2 11/15] target-sparc: Implement ldqf and stqf inline, Richard Henderson, 2016/10/18
- [Qemu-devel] [PATCH v2 14/15] target-sparc: Use tcg_gen_atomic_xchg_tl, Richard Henderson, 2016/10/18
- Re: [Qemu-devel] [PATCH v2 00/15] target-sparc improvements, no-reply, 2016/10/18
- Re: [Qemu-devel] [PATCH v2 00/15] target-sparc improvements, Mark Cave-Ayland, 2016/10/19