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[Qemu-devel] [PULL 04/23] target-m68k: manage scaled index
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PULL 04/23] target-m68k: manage scaled index |
Date: |
Tue, 25 Oct 2016 21:03:00 +0200 |
Scaled index is not supported by 68000, 68008, and 68010.
EA = (bd + PC) + Xn.SIZE*SCALE + od
Ignore it:
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
2.4 BRIEF EXTENSION WORD FORMAT COMPATIBILITY
"If the MC68000 were to execute an instruction that
encoded a scaling factor, the scaling factor would be
ignored and would not access the desired memory address.
The earlier microprocessors do not recognize the brief
extension word formats implemented by newer processors.
Although they can detect illegal instructions, they do not
decode invalid encodings of the brief extension word formats
as exceptions."
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
target-m68k/translate.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 3773fb4..d73350c 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -315,6 +315,11 @@ static TCGv gen_lea_indexed(CPUM68KState *env,
DisasContext *s, TCGv base)
if ((ext & 0x800) == 0 && !m68k_feature(s->env, M68K_FEATURE_WORD_INDEX))
return NULL_QREG;
+ if (m68k_feature(s->env, M68K_FEATURE_M68000) &&
+ !m68k_feature(s->env, M68K_FEATURE_SCALED_INDEX)) {
+ ext &= ~(3 << 9);
+ }
+
if (ext & 0x100) {
/* full extension word format */
if (!m68k_feature(s->env, M68K_FEATURE_EXT_FULL))
--
2.7.4
- [Qemu-devel] [PULL 00/23] M68k part1 patches, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PULL 06/23] target-m68k: set disassembler mode to 680x0 or coldfire, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PULL 09/23] target-m68k: REG() macro cleanup, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PULL 04/23] target-m68k: manage scaled index,
Laurent Vivier <=
- [Qemu-devel] [PULL 01/23] target-m68k: fix DEBUG_DISPATCH, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PULL 02/23] target-m68k: Build the opcode table only once to avoid multithreading issues, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PULL 03/23] target-m68k: define m680x0 CPUs and features, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PULL 15/23] target-m68k: update CPU flags management, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PULL 13/23] target-m68k: update move to/from ccr/sr, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PULL 21/23] target-m68k: Use setcond for scc, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PULL 08/23] target-m68k: set PAGE_BITS to 12 for m68k, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PULL 07/23] target-m68k: define operand sizes, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PULL 12/23] target-m68k: remove m68k_cpu_exec_enter() and m68k_cpu_exec_exit(), Laurent Vivier, 2016/10/25
- [Qemu-devel] [PULL 05/23] target-m68k: introduce read_imXX() functions, Laurent Vivier, 2016/10/25