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[Qemu-devel] [PATCH v1 09/30] target-sparc: implement UltraSPARC-T1 Stra


From: Artyom Tarasenko
Subject: [Qemu-devel] [PATCH v1 09/30] target-sparc: implement UltraSPARC-T1 Strand status ASR
Date: Fri, 4 Nov 2016 21:50:10 +0100

Signed-off-by: Artyom Tarasenko <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
 target-sparc/translate.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 0b0cde1..b898898 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -3429,6 +3429,17 @@ static void disas_sparc_insn(DisasContext * dc, unsigned 
int insn)
                 case 0x19: /* System tick compare */
                     gen_store_gpr(dc, rd, cpu_stick_cmpr);
                     break;
+                case 0x1a: /* UltraSPARC-T1 Strand status */
+                    /* XXX HYPV check maybe not enough, UA2005 & UA2007 
describe
+                     * this ASR as impl. dep
+                     */
+                    CHECK_IU_FEATURE(dc, HYPV);
+                    {
+                        TCGv t = gen_dest_gpr(dc, rd);
+                        tcg_gen_movi_tl(t, 1UL);
+                        gen_store_gpr(dc, rd, t);
+                    }
+                    break;
                 case 0x10: /* Performance Control */
                 case 0x11: /* Performance Instrumentation Counter */
                 case 0x12: /* Dispatch Control */
-- 
1.8.3.1




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