[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 1/5] target-m68k: implement 680x0 movem
From: |
Laurent Vivier |
Subject: |
Re: [Qemu-devel] [PATCH 1/5] target-m68k: implement 680x0 movem |
Date: |
Sun, 6 Nov 2016 17:52:50 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 |
Le 06/11/2016 à 07:18, Richard Henderson a écrit :
...
> + if (is_load) {
> + /* memory to register */
> + for (i = 0; i < 16; i++) {
> + if (mask & (1 << i)) {
> + r[i] = gen_load(s, opsize, addr, 1);
> + tcg_gen_add_i32(addr, addr, incr);
> + }
> + }
> + for (i = 0; i < 16; i++) {
> + if (mask & (1 << i)) {
> + tcg_gen_mov_i32(mreg(i), r[i]);
> + tcg_temp_free(r[i]);
> + }
> + }
> + if (mode == 3) {
> + /* post-increment: movem (An)+,X */
> + tcg_gen_mov_i32(AREG(insn, 0), addr);
Why AREG() instead of cpu_aregs[]?
> + }
> + } else {
> + /* register to memory */
> + if (mode == 4) {
> + /* pre-decrement: movem X,-(An) */
> + for (i = 15; i >= 0; i--) {
> + if ((mask << i) & 0x8000) {
> + tcg_gen_sub_i32(addr, addr, incr);
> + if (reg0 + 8 == i &&
> + m68k_feature(s->env, M68K_FEATURE_EXT_FULL)) {
> + /* M68020+: if the addressing register is the
> + * register moved to memory, the value written
> + * is the initial value decremented by the size of
> + * the operation, regardless of how many actual
> + * stores have been performed until this point.
> + * M68000/M68010: the value is the initial value.
> + */
> + TCGv tmp = tcg_temp_new();
tmp is already declared at the top of the function, perhaps you can
remove the declaration part here?
Thanks,
Laurent
- [Qemu-devel] [PATCH 0/5] target-m68k patches, Richard Henderson, 2016/11/06
- [Qemu-devel] [PATCH 2/5] target-m68k: Do not cpu_abort on undefined insns, Richard Henderson, 2016/11/06
- [Qemu-devel] [PATCH 1/5] target-m68k: implement 680x0 movem, Richard Henderson, 2016/11/06
- Re: [Qemu-devel] [PATCH 1/5] target-m68k: implement 680x0 movem,
Laurent Vivier <=
- [Qemu-devel] [PATCH 4/5] target-m68k: Implement bitfield ops for registers, Richard Henderson, 2016/11/06
- [Qemu-devel] [PATCH 3/5] target-m68k: Inline shifts, Richard Henderson, 2016/11/06
- [Qemu-devel] [PATCH 5/5] target-m68k: Implement bitfield ops for memory, Richard Henderson, 2016/11/06
- Re: [Qemu-devel] [PATCH 0/5] target-m68k patches, Laurent Vivier, 2016/11/06
- Re: [Qemu-devel] [PATCH 0/5] target-m68k patches, Richard Henderson, 2016/11/07
- Re: [Qemu-devel] [PATCH 0/5] target-m68k patches, Laurent Vivier, 2016/11/07
- Re: [Qemu-devel] [PATCH 0/5] target-m68k patches, Peter Maydell, 2016/11/07
- Re: [Qemu-devel] [PATCH 0/5] target-m68k patches, Laurent Vivier, 2016/11/07
- Re: [Qemu-devel] [PATCH 0/5] target-m68k patches, Peter Maydell, 2016/11/07
- Re: [Qemu-devel] [PATCH 0/5] target-m68k patches, Laurent Vivier, 2016/11/07