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Re: [Qemu-devel] [PATCH 8/9] target-ppc: add vextu[bhw]lx instructions
From: |
Nikunj A Dadhania |
Subject: |
Re: [Qemu-devel] [PATCH 8/9] target-ppc: add vextu[bhw]lx instructions |
Date: |
Wed, 23 Nov 2016 10:18:45 +0530 |
User-agent: |
Notmuch/0.21 (https://notmuchmail.org) Emacs/25.0.94.1 (x86_64-redhat-linux-gnu) |
David Gibson <address@hidden> writes:
> [ Unknown signature status ]
> On Tue, Nov 22, 2016 at 05:16:04PM +0530, Nikunj A Dadhania wrote:
>> From: Avinesh Kumar <address@hidden>
>>
>> vextublx: Vector Extract Unsigned Byte Left
>> vextuhlx: Vector Extract Unsigned Halfword Left
>> vextuwlx: Vector Extract Unsigned Word Left
>>
>> Signed-off-by: Avinesh Kumar <address@hidden>
>> Signed-off-by: Nikunj A Dadhania <address@hidden>
>> ---
>> target-ppc/helper.h | 3 ++
>> target-ppc/int_helper.c | 63
>> +++++++++++++++++++++++++++++++++++++
>> target-ppc/translate/vmx-impl.inc.c | 18 +++++++++++
>> target-ppc/translate/vmx-ops.inc.c | 4 ++-
>> 4 files changed, 87 insertions(+), 1 deletion(-)
>>
>> diff --git a/target-ppc/helper.h b/target-ppc/helper.h
>> index 3b26678..d0a8fb2 100644
>> --- a/target-ppc/helper.h
>> +++ b/target-ppc/helper.h
>> @@ -366,6 +366,9 @@ DEF_HELPER_3(vpmsumb, void, avr, avr, avr)
>> DEF_HELPER_3(vpmsumh, void, avr, avr, avr)
>> DEF_HELPER_3(vpmsumw, void, avr, avr, avr)
>> DEF_HELPER_3(vpmsumd, void, avr, avr, avr)
>> +DEF_HELPER_2(vextublx, tl, tl, avr)
>> +DEF_HELPER_2(vextuhlx, tl, tl, avr)
>> +DEF_HELPER_2(vextuwlx, tl, tl, avr)
>>
>> DEF_HELPER_2(vsbox, void, avr, avr)
>> DEF_HELPER_3(vcipher, void, avr, avr, avr)
>> diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
>> index 8886a72..fb9f178 100644
>> --- a/target-ppc/int_helper.c
>> +++ b/target-ppc/int_helper.c
>> @@ -1805,6 +1805,69 @@ void helper_vlogefp(CPUPPCState *env, ppc_avr_t *r,
>> ppc_avr_t *b)
>> }
>> }
>>
>> +#define EXTRACT128(value, start, length) \
>> + ((value >> start) & (~(__uint128_t)0 >> (128 - length)))
>
> Although we do use 128-bit arithmetic in some places in qemu, I don't
> think we assume the presence of a working uint1238_t type. Better to
> actually write a helper function which does this in terms of 64 bit
> arithmetic, I think.
I think we should have it in #if defined(CONFIG_INT128), as the callers
are already within the define.
>> +
>> +#if defined(HOST_WORDS_BIGENDIAN)
>> +# if defined(CONFIG_INT128)
>> +# define VEXTULX_DO(name, elem) \
>> +target_ulong glue(helper_, name)(target_ulong a, ppc_avr_t *b) \
>
> It seems a bit odd to need helpers for what's essentially just copying
> a byte/halfword/whatever out of the vector.
Are you suggesting to do this using tcg_ops ?
In tcg, vector is represented as high/low, so the extraction in boundary
cases will get ugly.
>> +{ \
>> + target_ulong r = 0; \
>> + int index = (a & 0xf) * 8; \
>> + r = EXTRACT128(b->u128, index, elem * 8); \
>> + return r; \
>> +}
Regards
Nikunj
- Re: [Qemu-devel] [PATCH 2/9] target-ppc: Fix xscmpodp and xscmpudp instructions, (continued)
[Qemu-devel] [PATCH 3/9] target-ppc: Add xscmpexp[dp, qp] instructions, Nikunj A Dadhania, 2016/11/22
[Qemu-devel] [PATCH 9/9] target-ppc: add vextu[bhw]rx instructions, Nikunj A Dadhania, 2016/11/22
[Qemu-devel] [PATCH 7/9] target-ppc: implement lxv/lxvx and stxv/stxvx, Nikunj A Dadhania, 2016/11/22
[Qemu-devel] [PATCH 6/9] target-ppc: implement stxsd and stxssp, Nikunj A Dadhania, 2016/11/22
[Qemu-devel] [PATCH 8/9] target-ppc: add vextu[bhw]lx instructions, Nikunj A Dadhania, 2016/11/22
[Qemu-devel] [PATCH 5/9] target-ppc: implement lxsd and lxssp instructions, Nikunj A Dadhania, 2016/11/22
[Qemu-devel] [PATCH 4/9] target-ppc: Add xscmpoqp and xscmpuqp instructions, Nikunj A Dadhania, 2016/11/22