[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 1/5] ARM BE8/BE32 semihosting and gdbstub suppor
From: |
Julian Brown |
Subject: |
Re: [Qemu-devel] [PATCH 1/5] ARM BE8/BE32 semihosting and gdbstub support. |
Date: |
Tue, 6 Dec 2016 15:11:30 +0000 |
On Thu, 3 Nov 2016 22:23:09 +0000
Peter Maydell <address@hidden> wrote:
> Strong 'no' for the approach of having different CPU
> names, I'm afraid. What you want is to have a CPU
> property which works like the hardware CPU's CFGEND
> signal to set the reset value of the SCTLR.EE bit. Then
> a board can use that where it would wire up CFGEND
> in real hardware, and on the command line you can
> have -cpu whatever,cfgend=yes (which is a bit ugly
> but then it's borderline whether it makes any sense at
> all for the user to be able to set the endianness on
> the commandline).
How about something like this? (Re-testing these patches has taken a
while because I hit apparent reliability problems running GDB tests
against the trunk QEMU: I filed
https://bugs.launchpad.net/qemu/+bug/1647683 for that).
(There's some slight dubiousness about memory ownership with the GLIB
functions -- I don't have a good handle on that, really, but I think
it's OK.)
Thanks,
Julian
0001-ARM-BE8-BE32-semihosting-and-gdbstub-support.patch
Description: Text Data
- Re: [Qemu-devel] [PATCH 1/5] ARM BE8/BE32 semihosting and gdbstub support.,
Julian Brown <=