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[Qemu-devel] [PULL 21/25] aspeed/smc: improve segment register support
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 21/25] aspeed/smc: improve segment register support |
Date: |
Tue, 27 Dec 2016 15:21:13 +0000 |
From: Cédric Le Goater <address@hidden>
The HW does not enforce all the rules in the specs and allows a few
"curious" setups like zero size segments and overlaps. So change the
model to be in sync but keep the warnings which are always interesting
for debug.
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Joel Stanley <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/ssi/aspeed_smc.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 6e8403e..78f5aed 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -253,7 +253,8 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState *s,
int cs,
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Tried to change CS0 start address to 0x%"
HWADDR_PRIx "\n", s->ctrl->name, seg.addr);
- return;
+ seg.addr = s->ctrl->flash_window_base;
+ new = aspeed_smc_segment_to_reg(&seg);
}
/*
@@ -267,8 +268,10 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState
*s, int cs,
s->ctrl->segments[cs].size) {
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Tried to change CS%d end address to 0x%"
- HWADDR_PRIx "\n", s->ctrl->name, cs, seg.addr);
- return;
+ HWADDR_PRIx "\n", s->ctrl->name, cs, seg.addr +
seg.size);
+ seg.size = s->ctrl->segments[cs].addr + s->ctrl->segments[cs].size -
+ seg.addr;
+ new = aspeed_smc_segment_to_reg(&seg);
}
/* Keep the segment in the overall flash window */
@@ -281,16 +284,14 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState
*s, int cs,
}
/* Check start address vs. alignment */
- if (seg.addr % seg.size) {
+ if (seg.size && !QEMU_IS_ALIGNED(seg.addr, seg.size)) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: new segment for CS%d is not "
"aligned : [ 0x%"HWADDR_PRIx" - 0x%"HWADDR_PRIx" ]\n",
s->ctrl->name, cs, seg.addr, seg.addr + seg.size);
}
- /* And segments should not overlap */
- if (aspeed_smc_flash_overlap(s, &seg, cs)) {
- return;
- }
+ /* And segments should not overlap (in the specs) */
+ aspeed_smc_flash_overlap(s, &seg, cs);
/* All should be fine now to move the region */
memory_region_transaction_begin();
--
2.7.4
- [Qemu-devel] [PULL 11/25] m25p80: add support for the mx66l1g45g, (continued)
- [Qemu-devel] [PULL 11/25] m25p80: add support for the mx66l1g45g, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 12/25] aspeed: QOMify the CPU object and attach it to the SoC, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 13/25] aspeed: remove cannot_destroy_with_object_finalize_yet, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 14/25] aspeed: attach the second SPI controller object to the SoC, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 15/25] aspeed: extend the board configuration with flash models, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 16/25] aspeed: add support for the romulus-bmc board, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 17/25] aspeed: add a memory region for SRAM, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 18/25] aspeed: add the definitions for the AST2400 A1 SoC, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 19/25] aspeed: change SoC revision of the palmetto-bmc machine, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 20/25] aspeed/scu: fix SCU region size, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 21/25] aspeed/smc: improve segment register support,
Peter Maydell <=
- [Qemu-devel] [PULL 22/25] aspeed/smc: set the number of flash modules for the FMC controller, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 23/25] hw/arm: remove trailing whitespace, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 24/25] hw/i2c: Add a NULL check for i2c slave init callbacks, Peter Maydell, 2016/12/27
- [Qemu-devel] [PULL 25/25] target-arm: Add VBAR support to ARM1176 CPUs, Peter Maydell, 2016/12/27
- Re: [Qemu-devel] [PULL 00/25] target-arm queue, Peter Maydell, 2016/12/27