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[Qemu-devel] [PULL 56/65] target-ppc: Use ctpop helper
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 56/65] target-ppc: Use ctpop helper |
Date: |
Tue, 10 Jan 2017 18:18:11 -0800 |
Signed-off-by: Richard Henderson <address@hidden>
---
target/ppc/helper.h | 3 +--
target/ppc/int_helper.c | 18 +++---------------
target/ppc/translate.c | 6 +++++-
3 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 1ed1d2c..0a8fbba 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -39,12 +39,11 @@ DEF_HELPER_4(divweu, tl, env, tl, tl, i32)
DEF_HELPER_4(divwe, tl, env, tl, tl, i32)
DEF_HELPER_FLAGS_1(popcntb, TCG_CALL_NO_RWG_SE, tl, tl)
-DEF_HELPER_FLAGS_1(popcntw, TCG_CALL_NO_RWG_SE, tl, tl)
DEF_HELPER_FLAGS_2(cmpb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
DEF_HELPER_3(sraw, tl, env, tl, tl)
#if defined(TARGET_PPC64)
DEF_HELPER_FLAGS_2(cmpeqb, TCG_CALL_NO_RWG_SE, i32, tl, tl)
-DEF_HELPER_FLAGS_1(popcntd, TCG_CALL_NO_RWG_SE, tl, tl)
+DEF_HELPER_FLAGS_1(popcntw, TCG_CALL_NO_RWG_SE, tl, tl)
DEF_HELPER_FLAGS_2(bpermd, TCG_CALL_NO_RWG_SE, i64, i64, i64)
DEF_HELPER_3(srad, tl, env, tl, tl)
DEF_HELPER_0(darn32, tl)
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index e1bb695..1871792 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -272,6 +272,7 @@ target_ulong helper_srad(CPUPPCState *env, target_ulong
value,
#if defined(TARGET_PPC64)
target_ulong helper_popcntb(target_ulong val)
{
+ /* Note that we don't fold past bytes */
val = (val & 0x5555555555555555ULL) + ((val >> 1) &
0x5555555555555555ULL);
val = (val & 0x3333333333333333ULL) + ((val >> 2) &
@@ -283,6 +284,7 @@ target_ulong helper_popcntb(target_ulong val)
target_ulong helper_popcntw(target_ulong val)
{
+ /* Note that we don't fold past words. */
val = (val & 0x5555555555555555ULL) + ((val >> 1) &
0x5555555555555555ULL);
val = (val & 0x3333333333333333ULL) + ((val >> 2) &
@@ -295,29 +297,15 @@ target_ulong helper_popcntw(target_ulong val)
0x0000ffff0000ffffULL);
return val;
}
-
-target_ulong helper_popcntd(target_ulong val)
-{
- return ctpop64(val);
-}
#else
target_ulong helper_popcntb(target_ulong val)
{
+ /* Note that we don't fold past bytes */
val = (val & 0x55555555) + ((val >> 1) & 0x55555555);
val = (val & 0x33333333) + ((val >> 2) & 0x33333333);
val = (val & 0x0f0f0f0f) + ((val >> 4) & 0x0f0f0f0f);
return val;
}
-
-target_ulong helper_popcntw(target_ulong val)
-{
- val = (val & 0x55555555) + ((val >> 1) & 0x55555555);
- val = (val & 0x33333333) + ((val >> 2) & 0x33333333);
- val = (val & 0x0f0f0f0f) + ((val >> 4) & 0x0f0f0f0f);
- val = (val & 0x00ff00ff) + ((val >> 8) & 0x00ff00ff);
- val = (val & 0x0000ffff) + ((val >> 16) & 0x0000ffff);
- return val;
-}
#endif
/*****************************************************************************/
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 1224f56..1212180 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -1844,14 +1844,18 @@ static void gen_popcntb(DisasContext *ctx)
static void gen_popcntw(DisasContext *ctx)
{
+#if defined(TARGET_PPC64)
gen_helper_popcntw(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]);
+#else
+ tcg_gen_ctpop_i32(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]);
+#endif
}
#if defined(TARGET_PPC64)
/* popcntd: PowerPC 2.06 specification */
static void gen_popcntd(DisasContext *ctx)
{
- gen_helper_popcntd(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]);
+ tcg_gen_ctpop_i64(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]);
}
#endif
--
2.9.3
- [Qemu-devel] [PULL 47/65] tcg/i386: Allow bmi2 shiftx to have non-matching operands, (continued)
- [Qemu-devel] [PULL 47/65] tcg/i386: Allow bmi2 shiftx to have non-matching operands, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 45/65] tcg/i386: Fuly convert tcg_target_op_def, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 46/65] tcg/i386: Hoist common arguments in tcg_out_op, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 49/65] tcg/i386: Rely on undefined/undocumented behaviour of BSF/BSR, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 48/65] tcg/i386: Handle ctz and clz opcodes, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 51/65] target-arm: Use clrsb helper, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 50/65] tcg: Add helpers for clrsb, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 52/65] target-tricore: Use clrsb helper, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 55/65] target-alpha: Use ctpop helper, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 57/65] target-s390x: Avoid a loop for popcnt, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 56/65] target-ppc: Use ctpop helper,
Richard Henderson <=
- [Qemu-devel] [PULL 60/65] target-i386: Use ctpop helper, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 58/65] target-sparc: Use ctpop helper, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 59/65] target-tilegx: Use ctpop helper, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 53/65] target-xtensa: Use clrsb helper, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 54/65] tcg: Add opcode for ctpop, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 62/65] tests: New test-bitcnt, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 63/65] tcg: Use ctpop to generate ctz if needed, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 64/65] tcg/ppc: Handle ctpop opcode, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 61/65] qemu/host-utils.h: Reduce the operation count in the fallback ctpop, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 65/65] tcg/i386: Handle ctpop opcode, Richard Henderson, 2017/01/10