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Re: [Qemu-devel] [PULL 00/65] tcg 2.9 patch queue
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From: |
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Subject: |
Re: [Qemu-devel] [PULL 00/65] tcg 2.9 patch queue |
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Date: |
Tue, 10 Jan 2017 19:39:57 -0800 (PST) |
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: address@hidden
Subject: [Qemu-devel] [PULL 00/65] tcg 2.9 patch queue
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
# Useful git options
git config --local diff.renamelimit 0
git config --local diff.renames True
commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
* [new tag] patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
0f88f5c tcg/i386: Handle ctpop opcode
1f3246b tcg/ppc: Handle ctpop opcode
4370d94 tcg: Use ctpop to generate ctz if needed
8f62669 tests: New test-bitcnt
69127b1 qemu/host-utils.h: Reduce the operation count in the fallback ctpop
1350149 target-i386: Use ctpop helper
805f523 target-tilegx: Use ctpop helper
2cc6764 target-sparc: Use ctpop helper
4e44386 target-s390x: Avoid a loop for popcnt
6c03e5a target-ppc: Use ctpop helper
fd08074 target-alpha: Use ctpop helper
e0ee946 tcg: Add opcode for ctpop
0600bbc target-xtensa: Use clrsb helper
03fe872 target-tricore: Use clrsb helper
769636c target-arm: Use clrsb helper
606349a tcg: Add helpers for clrsb
b67b0f6 tcg/i386: Rely on undefined/undocumented behaviour of BSF/BSR
5c30589 tcg/i386: Handle ctz and clz opcodes
c6f6448 tcg/i386: Allow bmi2 shiftx to have non-matching operands
c6bfd03 tcg/i386: Hoist common arguments in tcg_out_op
28b7dc6 tcg/i386: Fuly convert tcg_target_op_def
4db1625 tcg/s390: Handle clz opcode
97bfc69 tcg/mips: Handle clz opcode
98030d0 tcg/arm: Handle ctz and clz opcodes
d8e9db5 tcg/aarch64: Handle ctz and clz opcodes
7933434 tcg/ppc: Handle ctz and clz opcodes
b5e0a81 target-i386: Use clz and ctz opcodes
2fdd2e2 target-arm: Use clz opcode
b010d9e target-xtensa: Use clz opcode
a314d9c target-unicore32: Use clz opcode
1434c43 target-tricore: Use clz opcode
0a8fb83 target-tilegx: Use clz and ctz opcodes
2c0ce2e target-s390x: Use clz opcode
1bb6181 target-ppc: Use clz and ctz opcodes
ebc74b7 target-openrisc: Use clz and ctz opcodes
9064b6b target-mips: Use clz opcode
7f35208 target-microblaze: Use clz opcode
813c4d8 target-cris: Use clz opcode
a836c13 target-alpha: Use the ctz and clz opcodes
f6f3d2d disas/ppc: Handle popcnt and cnttz
926a4aa disas/i386.c: Handle tzcnt
6e2652a tcg: Add clz and ctz opcodes
b29aa2d tcg: Allow an operand to be matching or a constant
69d5374 tcg: Pass the opcode width to target_parse_constraint
22172f4 tcg: Transition flat op_defs array to a target callback
60a4dd8 tcg: Add markup for output requires new register
49d060f tcg/optimize: Fold movcond 0/1 into setcond
c6e6941 target-s390x: Use the new deposit and extract ops
167b3dd target-ppc: Use the new deposit and extract ops
a2b1d9f target-mips: Use the new extract op
45a06b9 target-i386: Use new deposit and extract ops
4f4c27f target-arm: Use new deposit and extract ops
3570370 target-alpha: Use deposit and extract ops
668aac4 tcg/s390: Support deposit into zero
46dd947 tcg/s390: Implement field extraction opcodes
84ba4fb tcg/s390: Expose host facilities to tcg-target.h
097af24 tcg/ppc: Implement field extraction opcodes
f89420b tcg/mips: Implement field extraction opcodes
af85983 tcg/i386: Implement field extraction opcodes
7241ba6 tcg/arm: Implement field extraction opcodes
ef59c05 tcg/arm: Move isa detection to tcg-target.h
0e1c309 tcg/aarch64: Implement field extraction opcodes
e8078b3 tcg: Add deposit_z expander
31acf47 tcg: Minor adjustments to deposit expanders
1090144 tcg: Add field extraction primitives
=== OUTPUT BEGIN ===
Checking PATCH 1/65: tcg: Add field extraction primitives...
ERROR: spaces required around that ':' (ctx:VxE)
#143: FILE: tcg/optimize.c:881:
+ CASE_OP_32_64(extract):
^
ERROR: spaces required around that ':' (ctx:VxE)
#149: FILE: tcg/optimize.c:887:
+ CASE_OP_32_64(sextract):
^
ERROR: spaces required around that ':' (ctx:VxE)
#163: FILE: tcg/optimize.c:1064:
+ CASE_OP_32_64(extract):
^
ERROR: spaces required around that ':' (ctx:VxE)
#171: FILE: tcg/optimize.c:1072:
+ CASE_OP_32_64(sextract):
^
ERROR: space prohibited after that '&&' (ctx:ExW)
#275: FILE: tcg/tcg-op.c:582:
+ && TCG_TARGET_extract_i32_valid(ofs, len)) {
^
ERROR: space prohibited after that '&&' (ctx:ExW)
#338: FILE: tcg/tcg-op.c:645:
+ && TCG_TARGET_extract_i32_valid(ofs, len)) {
^
ERROR: space prohibited after that '&&' (ctx:ExW)
#424: FILE: tcg/tcg-op.c:1799:
+ && TCG_TARGET_extract_i64_valid(ofs, len)) {
^
ERROR: space prohibited after that '&&' (ctx:ExW)
#530: FILE: tcg/tcg-op.c:1905:
+ && TCG_TARGET_extract_i64_valid(ofs, len)) {
^
total: 8 errors, 0 warnings, 599 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 2/65: tcg: Minor adjustments to deposit expanders...
Checking PATCH 3/65: tcg: Add deposit_z expander...
ERROR: space prohibited after that '&&' (ctx:ExW)
#33: FILE: tcg/tcg-op.c:577:
+ && TCG_TARGET_deposit_i32_valid(ofs, len)) {
^
ERROR: space prohibited after that '&&' (ctx:ExW)
#98: FILE: tcg/tcg-op.c:1836:
+ && TCG_TARGET_deposit_i64_valid(ofs, len)) {
^
total: 2 errors, 0 warnings, 185 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 4/65: tcg/aarch64: Implement field extraction opcodes...
Checking PATCH 5/65: tcg/arm: Move isa detection to tcg-target.h...
WARNING: architecture specific defines should be avoided
#25: FILE: tcg/arm/tcg-target.h:30:
+#ifndef __ARM_ARCH
WARNING: architecture specific defines should be avoided
#26: FILE: tcg/arm/tcg-target.h:31:
+# if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \
WARNING: architecture specific defines should be avoided
#45: FILE: tcg/arm/tcg-target.h:50:
+#if defined(__ARM_ARCH_5T__) \
total: 0 errors, 3 warnings, 107 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 6/65: tcg/arm: Implement field extraction opcodes...
Checking PATCH 7/65: tcg/i386: Implement field extraction opcodes...
Checking PATCH 8/65: tcg/mips: Implement field extraction opcodes...
Checking PATCH 9/65: tcg/ppc: Implement field extraction opcodes...
Checking PATCH 10/65: tcg/s390: Expose host facilities to tcg-target.h...
Checking PATCH 11/65: tcg/s390: Implement field extraction opcodes...
ERROR: spaces required around that ':' (ctx:VxE)
#52: FILE: tcg/s390/tcg-target.inc.c:2167:
+ OP_32_64(extract):
^
total: 1 errors, 0 warnings, 51 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 12/65: tcg/s390: Support deposit into zero...
Checking PATCH 13/65: target-alpha: Use deposit and extract ops...
Checking PATCH 14/65: target-arm: Use new deposit and extract ops...
Checking PATCH 15/65: target-i386: Use new deposit and extract ops...
Checking PATCH 16/65: target-mips: Use the new extract op...
Checking PATCH 17/65: target-ppc: Use the new deposit and extract ops...
Checking PATCH 18/65: target-s390x: Use the new deposit and extract ops...
Checking PATCH 19/65: tcg/optimize: Fold movcond 0/1 into setcond...
Checking PATCH 20/65: tcg: Add markup for output requires new register...
Checking PATCH 21/65: tcg: Transition flat op_defs array to a target callback...
Checking PATCH 22/65: tcg: Pass the opcode width to target_parse_constraint...
ERROR: space required before the open parenthesis '('
#106: FILE: tcg/i386/tcg-target.inc.c:172:
+ switch(*ct_str++) {
ERROR: space required before the open parenthesis '('
#140: FILE: tcg/ia64/tcg-target.inc.c:727:
+ switch(*ct_str++) {
ERROR: space required before the open parenthesis '('
#174: FILE: tcg/mips/tcg-target.inc.c:192:
+ switch(*ct_str++) {
total: 3 errors, 0 warnings, 289 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 23/65: tcg: Allow an operand to be matching or a constant...
ERROR: space required before the open parenthesis '('
#93: FILE: tcg/tcg.c:1260:
+ switch(*ct_str) {
total: 1 errors, 0 warnings, 109 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 24/65: tcg: Add clz and ctz opcodes...
ERROR: spaces required around that ':' (ctx:VxE)
#192: FILE: tcg/optimize.c:1077:
+ CASE_OP_32_64(clz):
^
ERROR: spaces required around that ':' (ctx:VxE)
#193: FILE: tcg/optimize.c:1078:
+ CASE_OP_32_64(ctz):
^
ERROR: space prohibited after that '&&' (ctx:ExW)
#382: FILE: tcg/tcg-op.c:1798:
+ && arg2 <= 0xffffffffu) {
^
ERROR: space prohibited after that '&&' (ctx:ExW)
#419: FILE: tcg/tcg-op.c:1835:
+ && arg2 <= 0xffffffffu) {
^
total: 4 errors, 0 warnings, 446 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 25/65: disas/i386.c: Handle tzcnt...
ERROR: Macros with complex values should be enclosed in parenthesis
#17: FILE: disas/i386.c:685:
+#define PREGRP107 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 107 } }
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: space required after that ',' (ctx:VxV)
#35: FILE: disas/i386.c:1435:
+ /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,1,1,0,0, /* bf */
^
ERROR: code indent should never use tabs
#45: FILE: disas/i386.c:2806:
+ { "bsfS",^I{ Gv, Ev } },$
ERROR: code indent should never use tabs
#46: FILE: disas/i386.c:2807:
+ { "tzcntS",^I{ Gv, Ev } },$
ERROR: code indent should never use tabs
#47: FILE: disas/i386.c:2808:
+ { "bsfS",^I{ Gv, Ev } },$
ERROR: code indent should never use tabs
#48: FILE: disas/i386.c:2809:
+ { "(bad)",^I{ XX } },$
total: 20 errors, 0 warnings, 36 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 26/65: disas/ppc: Handle popcnt and cnttz...
ERROR: space required after that ',' (ctx:VxV)
#27: FILE: disas/ppc.c:3595:
+{ "popcntw", X(31,378), XRB_MASK, POWER7, { RA, RS } },
^
ERROR: space required after that ',' (ctx:VxV)
#28: FILE: disas/ppc.c:3596:
+{ "popcntd", X(31,506), XRB_MASK, POWER7, { RA, RS } },
^
ERROR: space required after that ',' (ctx:VxV)
#30: FILE: disas/ppc.c:3598:
+{ "cnttzw", XRC(31,538,0), XRB_MASK, POWER9, { RA, RS } },
^
ERROR: space required after that ',' (ctx:VxV)
#30: FILE: disas/ppc.c:3598:
+{ "cnttzw", XRC(31,538,0), XRB_MASK, POWER9, { RA, RS } },
^
ERROR: space required after that ',' (ctx:VxV)
#31: FILE: disas/ppc.c:3599:
+{ "cnttzw.", XRC(31,538,1), XRB_MASK, POWER9, { RA, RS } },
^
ERROR: space required after that ',' (ctx:VxV)
#31: FILE: disas/ppc.c:3599:
+{ "cnttzw.", XRC(31,538,1), XRB_MASK, POWER9, { RA, RS } },
^
ERROR: space required after that ',' (ctx:VxV)
#32: FILE: disas/ppc.c:3600:
+{ "cnttzd", XRC(31,570,0), XRB_MASK, POWER9, { RA, RS } },
^
ERROR: space required after that ',' (ctx:VxV)
#32: FILE: disas/ppc.c:3600:
+{ "cnttzd", XRC(31,570,0), XRB_MASK, POWER9, { RA, RS } },
^
ERROR: space required after that ',' (ctx:VxV)
#33: FILE: disas/ppc.c:3601:
+{ "cnttzd.", XRC(31,570,1), XRB_MASK, POWER9, { RA, RS } },
^
ERROR: space required after that ',' (ctx:VxV)
#33: FILE: disas/ppc.c:3601:
+{ "cnttzd.", XRC(31,570,1), XRB_MASK, POWER9, { RA, RS } },
^
total: 10 errors, 0 warnings, 22 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 27/65: target-alpha: Use the ctz and clz opcodes...
Checking PATCH 28/65: target-cris: Use clz opcode...
Checking PATCH 29/65: target-microblaze: Use clz opcode...
Checking PATCH 30/65: target-mips: Use clz opcode...
Checking PATCH 31/65: target-openrisc: Use clz and ctz opcodes...
Checking PATCH 32/65: target-ppc: Use clz and ctz opcodes...
Checking PATCH 33/65: target-s390x: Use clz opcode...
Checking PATCH 34/65: target-tilegx: Use clz and ctz opcodes...
Checking PATCH 35/65: target-tricore: Use clz opcode...
Checking PATCH 36/65: target-unicore32: Use clz opcode...
Checking PATCH 37/65: target-xtensa: Use clz opcode...
Checking PATCH 38/65: target-arm: Use clz opcode...
ERROR: trailing statements should be on next line
#126: FILE: target/arm/translate.c:7040:
+ case 2: tcg_gen_clzi_i32(tmp, tmp, 32); break;
total: 1 errors, 0 warnings, 100 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 39/65: target-i386: Use clz and ctz opcodes...
Checking PATCH 40/65: tcg/ppc: Handle ctz and clz opcodes...
Checking PATCH 41/65: tcg/aarch64: Handle ctz and clz opcodes...
Checking PATCH 42/65: tcg/arm: Handle ctz and clz opcodes...
Checking PATCH 43/65: tcg/mips: Handle clz opcode...
Checking PATCH 44/65: tcg/s390: Handle clz opcode...
Checking PATCH 45/65: tcg/i386: Fuly convert tcg_target_op_def...
Checking PATCH 46/65: tcg/i386: Hoist common arguments in tcg_out_op...
Checking PATCH 47/65: tcg/i386: Allow bmi2 shiftx to have non-matching
operands...
Checking PATCH 48/65: tcg/i386: Handle ctz and clz opcodes...
ERROR: spaces required around that ':' (ctx:VxE)
#219: FILE: tcg/i386/tcg-target.inc.c:2071:
+ OP_32_64(ctz):
^
ERROR: spaces required around that ':' (ctx:VxE)
#222: FILE: tcg/i386/tcg-target.inc.c:2074:
+ OP_32_64(clz):
^
total: 2 errors, 0 warnings, 237 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 49/65: tcg/i386: Rely on undefined/undocumented behaviour of
BSF/BSR...
ERROR: spaces required around that ':' (ctx:VxW)
#50: FILE: tcg/i386/tcg-target.inc.c:1171:
+ TCGType type = rexw ? TCG_TYPE_I64: TCG_TYPE_I32;
^
total: 1 errors, 0 warnings, 65 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 50/65: tcg: Add helpers for clrsb...
Checking PATCH 51/65: target-arm: Use clrsb helper...
Checking PATCH 52/65: target-tricore: Use clrsb helper...
Checking PATCH 53/65: target-xtensa: Use clrsb helper...
Checking PATCH 54/65: tcg: Add opcode for ctpop...
ERROR: spaces required around that ':' (ctx:VxE)
#158: FILE: tcg/optimize.c:1047:
+ CASE_OP_32_64(ctpop):
^
total: 1 errors, 0 warnings, 259 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 55/65: target-alpha: Use ctpop helper...
Checking PATCH 56/65: target-ppc: Use ctpop helper...
Checking PATCH 57/65: target-s390x: Avoid a loop for popcnt...
Checking PATCH 58/65: target-sparc: Use ctpop helper...
Checking PATCH 59/65: target-tilegx: Use ctpop helper...
Checking PATCH 60/65: target-i386: Use ctpop helper...
Checking PATCH 61/65: qemu/host-utils.h: Reduce the operation count in the
fallback ctpop...
Checking PATCH 62/65: tests: New test-bitcnt...
ERROR: spaces required around that '=' (ctx:VxV)
#79: FILE: tests/test-bitcnt.c:25:
+ { { .w8 = 0x00 }, .popct=0 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#80: FILE: tests/test-bitcnt.c:26:
+ { { .w8 = 0x01 }, .popct=1 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#81: FILE: tests/test-bitcnt.c:27:
+ { { .w8 = 0x03 }, .popct=2 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#82: FILE: tests/test-bitcnt.c:28:
+ { { .w8 = 0x04 }, .popct=1 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#83: FILE: tests/test-bitcnt.c:29:
+ { { .w8 = 0x0f }, .popct=4 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#84: FILE: tests/test-bitcnt.c:30:
+ { { .w8 = 0x3f }, .popct=6 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#85: FILE: tests/test-bitcnt.c:31:
+ { { .w8 = 0x40 }, .popct=1 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#86: FILE: tests/test-bitcnt.c:32:
+ { { .w8 = 0xf0 }, .popct=4 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#87: FILE: tests/test-bitcnt.c:33:
+ { { .w8 = 0x7f }, .popct=7 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#88: FILE: tests/test-bitcnt.c:34:
+ { { .w8 = 0x80 }, .popct=1 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#89: FILE: tests/test-bitcnt.c:35:
+ { { .w8 = 0xf1 }, .popct=5 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#90: FILE: tests/test-bitcnt.c:36:
+ { { .w8 = 0xfe }, .popct=7 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#91: FILE: tests/test-bitcnt.c:37:
+ { { .w8 = 0xff }, .popct=8 },
^
ERROR: spaces required around that '==' (ctx:VxV)
#100: FILE: tests/test-bitcnt.c:46:
+ g_assert(ctpop8(d->value.w8)==d->popct);
^
ERROR: spaces required around that '=' (ctx:VxV)
#105: FILE: tests/test-bitcnt.c:51:
+ { { .w16 = 0x0000 }, .popct=0 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#106: FILE: tests/test-bitcnt.c:52:
+ { { .w16 = 0x0001 }, .popct=1 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#107: FILE: tests/test-bitcnt.c:53:
+ { { .w16 = 0x0003 }, .popct=2 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#108: FILE: tests/test-bitcnt.c:54:
+ { { .w16 = 0x000f }, .popct=4 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#109: FILE: tests/test-bitcnt.c:55:
+ { { .w16 = 0x003f }, .popct=6 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#110: FILE: tests/test-bitcnt.c:56:
+ { { .w16 = 0x00f0 }, .popct=4 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#111: FILE: tests/test-bitcnt.c:57:
+ { { .w16 = 0x0f0f }, .popct=8 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#112: FILE: tests/test-bitcnt.c:58:
+ { { .w16 = 0x1f1f }, .popct=10 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#113: FILE: tests/test-bitcnt.c:59:
+ { { .w16 = 0x4000 }, .popct=1 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#114: FILE: tests/test-bitcnt.c:60:
+ { { .w16 = 0x4001 }, .popct=2 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#115: FILE: tests/test-bitcnt.c:61:
+ { { .w16 = 0x7000 }, .popct=3 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#116: FILE: tests/test-bitcnt.c:62:
+ { { .w16 = 0x7fff }, .popct=15 },
^
ERROR: spaces required around that '==' (ctx:VxV)
#125: FILE: tests/test-bitcnt.c:71:
+ g_assert(ctpop16(d->value.w16)==d->popct);
^
ERROR: spaces required around that '=' (ctx:VxV)
#130: FILE: tests/test-bitcnt.c:76:
+ { { .w32 = 0x00000000 }, .popct=0 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#131: FILE: tests/test-bitcnt.c:77:
+ { { .w32 = 0x00000001 }, .popct=1 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#132: FILE: tests/test-bitcnt.c:78:
+ { { .w32 = 0x0000000f }, .popct=4 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#133: FILE: tests/test-bitcnt.c:79:
+ { { .w32 = 0x00000f0f }, .popct=8 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#134: FILE: tests/test-bitcnt.c:80:
+ { { .w32 = 0x00001f1f }, .popct=10 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#135: FILE: tests/test-bitcnt.c:81:
+ { { .w32 = 0x00004001 }, .popct=2 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#136: FILE: tests/test-bitcnt.c:82:
+ { { .w32 = 0x00007000 }, .popct=3 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#137: FILE: tests/test-bitcnt.c:83:
+ { { .w32 = 0x00007fff }, .popct=15 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#138: FILE: tests/test-bitcnt.c:84:
+ { { .w32 = 0x55555555 }, .popct=16 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#139: FILE: tests/test-bitcnt.c:85:
+ { { .w32 = 0xaaaaaaaa }, .popct=16 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#140: FILE: tests/test-bitcnt.c:86:
+ { { .w32 = 0xff000000 }, .popct=8 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#141: FILE: tests/test-bitcnt.c:87:
+ { { .w32 = 0xc0c0c0c0 }, .popct=8 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#142: FILE: tests/test-bitcnt.c:88:
+ { { .w32 = 0x0ffffff0 }, .popct=24 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#143: FILE: tests/test-bitcnt.c:89:
+ { { .w32 = 0x80000000 }, .popct=1 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#144: FILE: tests/test-bitcnt.c:90:
+ { { .w32 = 0xffffffff }, .popct=32 },
^
ERROR: spaces required around that '==' (ctx:VxV)
#153: FILE: tests/test-bitcnt.c:99:
+ g_assert(ctpop32(d->value.w32)==d->popct);
^
ERROR: spaces required around that '=' (ctx:VxV)
#158: FILE: tests/test-bitcnt.c:104:
+ { { .w64 = 0x0000000000000000ULL }, .popct=0 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#159: FILE: tests/test-bitcnt.c:105:
+ { { .w64 = 0x0000000000000001ULL }, .popct=1 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#160: FILE: tests/test-bitcnt.c:106:
+ { { .w64 = 0x000000000000000fULL }, .popct=4 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#161: FILE: tests/test-bitcnt.c:107:
+ { { .w64 = 0x0000000000000f0fULL }, .popct=8 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#162: FILE: tests/test-bitcnt.c:108:
+ { { .w64 = 0x0000000000001f1fULL }, .popct=10 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#163: FILE: tests/test-bitcnt.c:109:
+ { { .w64 = 0x0000000000004001ULL }, .popct=2 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#164: FILE: tests/test-bitcnt.c:110:
+ { { .w64 = 0x0000000000007000ULL }, .popct=3 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#165: FILE: tests/test-bitcnt.c:111:
+ { { .w64 = 0x0000000000007fffULL }, .popct=15 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#166: FILE: tests/test-bitcnt.c:112:
+ { { .w64 = 0x0000005500555555ULL }, .popct=16 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#167: FILE: tests/test-bitcnt.c:113:
+ { { .w64 = 0x00aa0000aaaa00aaULL }, .popct=16 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#168: FILE: tests/test-bitcnt.c:114:
+ { { .w64 = 0x000f000000f00000ULL }, .popct=8 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#169: FILE: tests/test-bitcnt.c:115:
+ { { .w64 = 0x0c0c0000c0c0c0c0ULL }, .popct=12 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#170: FILE: tests/test-bitcnt.c:116:
+ { { .w64 = 0xf00f00f0f0f0f000ULL }, .popct=24 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#171: FILE: tests/test-bitcnt.c:117:
+ { { .w64 = 0x8000000000000000ULL }, .popct=1 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#172: FILE: tests/test-bitcnt.c:118:
+ { { .w64 = 0xf0f0f0f0f0f0f0f0ULL }, .popct=32 },
^
ERROR: spaces required around that '=' (ctx:VxV)
#173: FILE: tests/test-bitcnt.c:119:
+ { { .w64 = 0xffffffffffffffffULL }, .popct=64 },
^
ERROR: spaces required around that '==' (ctx:VxV)
#182: FILE: tests/test-bitcnt.c:128:
+ g_assert(ctpop64(d->value.w64)==d->popct);
^
total: 60 errors, 0 warnings, 161 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 63/65: tcg: Use ctpop to generate ctz if needed...
ERROR: space prohibited after that '&&' (ctx:ExW)
#133: FILE: tcg/tcg-op.c:1883:
+ && TCG_TARGET_HAS_ctpop_i64
^
ERROR: space prohibited after that '&&' (ctx:ExW)
#134: FILE: tcg/tcg-op.c:1884:
+ && arg2 == 64) {
^
total: 2 errors, 0 warnings, 124 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 64/65: tcg/ppc: Handle ctpop opcode...
Checking PATCH 65/65: tcg/i386: Handle ctpop opcode...
ERROR: spaces required around that ':' (ctx:VxE)
#67: FILE: tcg/i386/tcg-target.inc.c:2088:
+ OP_32_64(ctpop):
^
total: 1 errors, 0 warnings, 67 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===
Test command exited with code: 1
---
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Please send your feedback to address@hidden
- [Qemu-devel] [PULL 60/65] target-i386: Use ctpop helper, (continued)
- [Qemu-devel] [PULL 60/65] target-i386: Use ctpop helper, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 58/65] target-sparc: Use ctpop helper, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 59/65] target-tilegx: Use ctpop helper, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 53/65] target-xtensa: Use clrsb helper, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 54/65] tcg: Add opcode for ctpop, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 62/65] tests: New test-bitcnt, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 63/65] tcg: Use ctpop to generate ctz if needed, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 64/65] tcg/ppc: Handle ctpop opcode, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 61/65] qemu/host-utils.h: Reduce the operation count in the fallback ctpop, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 65/65] tcg/i386: Handle ctpop opcode, Richard Henderson, 2017/01/10
- Re: [Qemu-devel] [PULL 00/65] tcg 2.9 patch queue,
no-reply <=
- Re: [Qemu-devel] [PULL 00/65] tcg 2.9 patch queue, Peter Maydell, 2017/01/12