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[Qemu-devel] [PULL 23/30] target-sparc: implement auto-demapping for UA2
From: |
Artyom Tarasenko |
Subject: |
[Qemu-devel] [PULL 23/30] target-sparc: implement auto-demapping for UA2005 CPUs |
Date: |
Wed, 18 Jan 2017 23:38:36 +0100 |
Signed-off-by: Artyom Tarasenko <address@hidden>
---
target/sparc/ldst_helper.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index d4eee33..4f55388 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -210,6 +210,28 @@ static void replace_tlb_1bit_lru(SparcTLBEntry *tlb,
{
unsigned int i, replace_used;
+ if (cpu_has_hypervisor(env1)) {
+ uint64_t new_vaddr = tlb_tag & ~0x1fffULL;
+ uint64_t new_size = 8192ULL << 3 * TTE_PGSIZE(tlb_tte);
+ uint32_t new_ctx = tlb_tag & 0x1fffU;
+ for (i = 0; i < 64; i++) {
+ uint32_t ctx = tlb[i].tag & 0x1fffU;
+ /* check if new mapping overlaps an existing one */
+ if (new_ctx == ctx) {
+ uint64_t vaddr = tlb[i].tag & ~0x1fffULL;
+ uint64_t size = 8192ULL << 3 * TTE_PGSIZE(tlb[i].tte);
+ if (new_vaddr == vaddr
+ || (new_vaddr < vaddr + size
+ && vaddr < new_vaddr + new_size)) {
+ DPRINTF_MMU("auto demap entry [%d] %lx->%lx\n", i, vaddr,
+ new_vaddr);
+ replace_tlb_entry(&tlb[i], tlb_tag, tlb_tte, env1);
+ return;
+ }
+ }
+
+ }
+ }
/* Try replacing invalid entry */
for (i = 0; i < 64; i++) {
if (!TTE_IS_VALID(tlb[i].tte)) {
--
2.7.2
- [Qemu-devel] [PULL 15/30] target-sparc: use direct address translation in hyperprivileged mode, (continued)
- [Qemu-devel] [PULL 15/30] target-sparc: use direct address translation in hyperprivileged mode, Artyom Tarasenko, 2017/01/18
- [Qemu-devel] [PULL 16/30] target-sparc: allow priveleged ASIs in hyperprivileged mode, Artyom Tarasenko, 2017/01/18
- [Qemu-devel] [PULL 17/30] target-sparc: ignore writes to UA2005 CPU mondo queue register, Artyom Tarasenko, 2017/01/18
- [Qemu-devel] [PULL 18/30] target-sparc: replace the last tlb entry when no free entries left, Artyom Tarasenko, 2017/01/18
- [Qemu-devel] [PULL 19/30] target-sparc: use SparcV9MMU type for sparc64 I/D-MMUs, Artyom Tarasenko, 2017/01/18
- [Qemu-devel] [PULL 20/30] target-sparc: implement UA2005 TSB Pointers, Artyom Tarasenko, 2017/01/18
- [Qemu-devel] [PULL 21/30] target-sparc: simplify ultrasparc_tsb_pointer, Artyom Tarasenko, 2017/01/18
- [Qemu-devel] [PULL 22/30] target-sparc: allow 256M sized pages, Artyom Tarasenko, 2017/01/18
- [Qemu-devel] [PULL 24/30] target-sparc: add more registers to dump_mmu, Artyom Tarasenko, 2017/01/18
- [Qemu-devel] [PULL 25/30] target-sparc: implement UA2005 ASI_MMU (0x21), Artyom Tarasenko, 2017/01/18
- [Qemu-devel] [PULL 23/30] target-sparc: implement auto-demapping for UA2005 CPUs,
Artyom Tarasenko <=
- [Qemu-devel] [PULL 27/30] target-sparc: add ST_BLKINIT_ ASIs for UA2005+ CPUs, Artyom Tarasenko, 2017/01/18
- [Qemu-devel] [PULL 28/30] target-sparc: implement sun4v RTC, Artyom Tarasenko, 2017/01/18
- [Qemu-devel] [PULL 30/30] target-sparc: fix up niagara machine, Artyom Tarasenko, 2017/01/18
- Re: [Qemu-devel] [PULL 30/30] target-sparc: fix up niagara machine, Peter Maydell, 2017/01/23
- Re: [Qemu-devel] [PULL 30/30] target-sparc: fix up niagara machine, Artyom Tarasenko, 2017/01/23
- Re: [Qemu-devel] [PULL 30/30] target-sparc: fix up niagara machine, Peter Maydell, 2017/01/23
- Re: [Qemu-devel] [PULL 30/30] target-sparc: fix up niagara machine, Artyom Tarasenko, 2017/01/23
- Re: [Qemu-devel] [PULL 30/30] target-sparc: fix up niagara machine, Peter Maydell, 2017/01/23
- Re: [Qemu-devel] [PULL 30/30] target-sparc: fix up niagara machine, Jakub Jermář, 2017/01/27
[Qemu-devel] [PULL 29/30] target-sparc: move common cpu initialisation routines to sparc64.c, Artyom Tarasenko, 2017/01/18