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Re: [Qemu-devel] [PATCH RFC v3 02/14] intel_iommu: simplify irq region t


From: Tian, Kevin
Subject: Re: [Qemu-devel] [PATCH RFC v3 02/14] intel_iommu: simplify irq region translation
Date: Sun, 22 Jan 2017 04:42:13 +0000

> From: Peter Xu [mailto:address@hidden
> Sent: Friday, January 20, 2017 6:04 PM
> 
> On Fri, Jan 20, 2017 at 09:52:01AM +0000, Tian, Kevin wrote:
> 
> [...]
> 
> > btw what about guest setups a valid mapping at 0xFEEx_xxxx in
> > its remapping structure, which is then programmed to virtual
> > device as DMA destination? Then when emulating that virtual DMA,
> > vtd_do_iommu_translate should simply return (maybe throw out
> > a warning for diagnostic purpose) instead of assert here.
> >
> > VT-d spec defines as below:
> >
> >     Software must ensure the second-level paging-structure entries
> >     are programmed not to remap input addresses to the interrupt
> >     address range. Hardware behavior is undefined for memory
> >     requests remapped to the interrupt address range.
> 
> Thanks for this reference. That's something I was curious about.
> 
> >
> > I don't think "hardware behavior is undefined" is equal to "assert
> > thus kill VM"...
> 
> I don't think it will kill the VM. After we have the MSI region, it
> should just use that IR region for everything (read/write/translate).
> So iiuc when anyone setups IOVA mapping within range 0xfeexxxxx, then
> a DMA will trigger an interrupt (rather than memory moves), but in
> most cases the interrupt will be illegal since either the data is
> invalid (e.g., non-zero reserved bits, or SID verification failure),
> further it should trigger a vIOMMU fault (though IR fault reporting is
> still incomplete, that's my next thing to do after this series).
> 

Yes, you're right here. Sorry for bothering with my wrong understanding. :-)

Thanks
Kevin

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