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[Qemu-devel] [PATCH v2 01/16] softfloat: define 680x0 specific values
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH v2 01/16] softfloat: define 680x0 specific values |
Date: |
Mon, 30 Jan 2017 19:16:19 +0100 |
Signed-off-by: Laurent Vivier <address@hidden>
---
fpu/softfloat-specialize.h | 30 +++++++++++++++++++++++++++---
1 file changed, 27 insertions(+), 3 deletions(-)
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index f05c865..01b594f 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -111,7 +111,7 @@ float16 float16_default_nan(float_status *status)
*----------------------------------------------------------------------------*/
float32 float32_default_nan(float_status *status)
{
-#if defined(TARGET_SPARC)
+#if defined(TARGET_SPARC) || defined(TARGET_M68K)
return const_float32(0x7FFFFFFF);
#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
defined(TARGET_XTENSA) || defined(TARGET_S390X) ||
defined(TARGET_TRICORE)
@@ -136,7 +136,7 @@ float32 float32_default_nan(float_status *status)
*----------------------------------------------------------------------------*/
float64 float64_default_nan(float_status *status)
{
-#if defined(TARGET_SPARC)
+#if defined(TARGET_SPARC) || defined(TARGET_M68K)
return const_float64(LIT64(0x7FFFFFFFFFFFFFFF));
#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
defined(TARGET_S390X)
@@ -162,7 +162,10 @@ float64 float64_default_nan(float_status *status)
floatx80 floatx80_default_nan(float_status *status)
{
floatx80 r;
-
+#if defined(TARGET_M68K)
+ r.low = LIT64(0xFFFFFFFFFFFFFFFF);
+ r.high = 0x7FFF;
+#else
if (status->snan_bit_is_one) {
r.low = LIT64(0xBFFFFFFFFFFFFFFF);
r.high = 0x7FFF;
@@ -170,6 +173,7 @@ floatx80 floatx80_default_nan(float_status *status)
r.low = LIT64(0xC000000000000000);
r.high = 0xFFFF;
}
+#endif
return r;
}
@@ -502,6 +506,26 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag
bIsQNaN, flag bIsSNaN,
return 1;
}
}
+#elif defined(TARGET_M68K)
+static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
+ flag aIsLargerSignificand)
+{
+ /* If either operand, but not both operands, of an operation is a
+ * nonsignaling NAN, then that NAN is returned as the result. If both
+ * operands are nonsignaling NANs, then the destination operand
+ * nonsignaling NAN is returned as the result.
+ */
+
+ if (aIsSNaN) {
+ return 0;
+ } else if (bIsSNaN) {
+ return 1;
+ } else if (bIsQNaN) {
+ return 1;
+ } else {
+ return 0;
+ }
+}
#else
static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
flag aIsLargerSignificand)
--
2.9.3
- [Qemu-devel] [PATCH v2 00/16] target-m68k: implement 680x0 FPU, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 01/16] softfloat: define 680x0 specific values,
Laurent Vivier <=
- [Qemu-devel] [PATCH v2 02/16] softloat: disable floatx80_invalid_encoding() for m68k, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 04/16] target-m68k: define ext_opsize, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 07/16] target-m68k: manage FPU exceptions, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 03/16] target-m68k: move FPU helpers to fpu_helper.c, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 13/16] target-m68k: add fsglmul and fsgldiv, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 08/16] target-m68k: define 96bit FP registers for gdb on 680x0, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 06/16] target-m68k: add FPCR and FPSR, Laurent Vivier, 2017/01/30