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Re: [Qemu-devel] [Qemu-ppc] [PATCH 48/77] ppc/pnv: Add model for Power8
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-devel] [Qemu-ppc] [PATCH 48/77] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge |
Date: |
Fri, 17 Mar 2017 09:24:58 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 |
Ben,
Quick question,
> +/* This is called whenever the PHB LSI, MSI source ID register or
> + * the PBCQ irq filters are written.
> + */
> +void pnv_phb3_remap_irqs(PnvPhb3State *phb)
> +{
> + uint32_t local, global, count, mask, comp;
> + uint64_t baren;
> +
> + /* First check if we are enabled. Unlike real HW we don't separate TX
> and RX
> + * so we enable if both are set
> + */
> + baren = phb->pbcq->nest_regs[PBCQ_NEST_BAR_EN];
> + if (!(baren & PBCQ_NEST_BAR_EN_IRSN_RX) ||
> + !(baren & PBCQ_NEST_BAR_EN_IRSN_TX)) {
> + phb->lsi_ics->offset = 0;
> + return;
> + }
> +
> + /* Grab local LSI source ID */
> + local = GETFIELD(PHB_LSI_SRC_ID, phb->regs[PHB_LSI_SOURCE_ID >> 3]) << 3;
> +
> + /* Grab global one and compare */
> + global = GETFIELD(PBCQ_NEST_LSI_SRC,
> + phb->pbcq->nest_regs[PBCQ_NEST_LSI_SRC_ID]) << 3;
> + if (global != local) {
> + /* This happens during initialization, let's come back when we
> + * are properly configured
> + */
> + phb->lsi_ics->offset = 0;
> + return;
> + }
> +
> + /* Get the base on the powerbus */
> + comp = GETFIELD(PBCQ_NEST_IRSN_COMP,
> + phb->pbcq->nest_regs[PBCQ_NEST_IRSN_COMPARE]);
> + mask = GETFIELD(PBCQ_NEST_IRSN_COMP,
> + phb->pbcq->nest_regs[PBCQ_NEST_IRSN_MASK]);
> + count = ((~mask) + 1) & 0x7ffff;
> + phb->total_irq = count;
> +
> + /* Sanity checks */
> + if ((global + 8) > count) {
> + DBG_MAP(phb, "LSIs out of reach: LSI base=%d total irq=%d",
> + global, count);
> + }
> + if (count > 2048) {
> + DBG_MAP(phb, "More interrupts than supported: %d", count);
> + }
> + if ((comp & mask) != comp) {
> + DBG_MAP(phb, "IRQ compare bits not in mask: comp=0x%x mask=0x%x",
> + comp, mask);
> + comp &= mask;
> + }
> + /* Setup LSI offset */
> + phb->lsi_ics->offset = comp + global;
> +
> + /* Setup MSI offset */
> + pnv_phb3_msi_update_config(phb->msis, comp, count);
I changed that to :
pnv_phb3_msi_update_config(phb->msis, comp, count - PHB_NUM_LSI);
else the IRQ numbers overlap with the LSI and I think this why we were
uselessly looping on the EOI.
Correct ?
C.
> +
> + DBG_MAP(phb, "Initialized for %d interrupts @0x%x, LSI off=%d",
> + count, comp, global);
> +}
> +
- Re: [Qemu-devel] [Qemu-ppc] [PATCH 48/77] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge,
Cédric Le Goater <=