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Re: [Qemu-devel] [PATCH v8 7/9] intel_iommu: provide its own replay() ca
From: |
Michael S. Tsirkin |
Subject: |
Re: [Qemu-devel] [PATCH v8 7/9] intel_iommu: provide its own replay() callback |
Date: |
Thu, 6 Apr 2017 14:57:50 +0300 |
On Thu, Apr 06, 2017 at 03:08:42PM +0800, Peter Xu wrote:
> The default replay() don't work for VT-d since vt-d will have a huge
> default memory region which covers address range 0-(2^64-1). This will
> normally consumes a lot of time (which looks like a dead loop).
>
> The solution is simple - we don't walk over all the regions. Instead, we
> jump over the regions when we found that the page directories are empty.
> It'll greatly reduce the time to walk the whole region.
>
> To achieve this, we provided a page walk helper to do that, invoking
> corresponding hook function when we found an page we are interested in.
> vtd_page_walk_level() is the core logic for the page walking. It's
> interface is designed to suite further use case, e.g., to invalidate a
> range of addresses.
>
> Reviewed-by: Jason Wang <address@hidden>
> Reviewed-by: David Gibson <address@hidden>
> Signed-off-by: Peter Xu <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
> ---
> hw/i386/intel_iommu.c | 182
> ++++++++++++++++++++++++++++++++++++++++++++++++--
> hw/i386/trace-events | 7 ++
> include/exec/memory.h | 2 +
> 3 files changed, 186 insertions(+), 5 deletions(-)
>
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 2412df4..7af4e22 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -595,6 +595,22 @@ static inline uint32_t
> vtd_get_agaw_from_context_entry(VTDContextEntry *ce)
> return 30 + (ce->hi & VTD_CONTEXT_ENTRY_AW) * 9;
> }
>
> +static inline uint64_t vtd_iova_limit(VTDContextEntry *ce)
> +{
> + uint32_t ce_agaw = vtd_get_agaw_from_context_entry(ce);
> + return 1ULL << MIN(ce_agaw, VTD_MGAW);
> +}
> +
> +/* Return true if IOVA passes range check, otherwise false. */
> +static inline bool vtd_iova_range_check(uint64_t iova, VTDContextEntry *ce)
> +{
> + /*
> + * Check if @iova is above 2^X-1, where X is the minimum of MGAW
> + * in CAP_REG and AW in context-entry.
> + */
> + return !(iova & ~(vtd_iova_limit(ce) - 1));
> +}
> +
> static const uint64_t vtd_paging_entry_rsvd_field[] = {
> [0] = ~0ULL,
> /* For not large page */
> @@ -630,13 +646,9 @@ static int vtd_iova_to_slpte(VTDContextEntry *ce,
> uint64_t iova, bool is_write,
> uint32_t level = vtd_get_level_from_context_entry(ce);
> uint32_t offset;
> uint64_t slpte;
> - uint32_t ce_agaw = vtd_get_agaw_from_context_entry(ce);
> uint64_t access_right_check;
>
> - /* Check if @iova is above 2^X-1, where X is the minimum of MGAW
> - * in CAP_REG and AW in context-entry.
> - */
> - if (iova & ~((1ULL << MIN(ce_agaw, VTD_MGAW)) - 1)) {
> + if (!vtd_iova_range_check(iova, ce)) {
> VTD_DPRINTF(GENERAL, "error: iova 0x%"PRIx64 " exceeds limits",
> iova);
> return -VTD_FR_ADDR_BEYOND_MGAW;
> }
> @@ -684,6 +696,134 @@ static int vtd_iova_to_slpte(VTDContextEntry *ce,
> uint64_t iova, bool is_write,
> }
> }
>
> +typedef int (*vtd_page_walk_hook)(IOMMUTLBEntry *entry, void *private);
> +
> +/**
> + * vtd_page_walk_level - walk over specific level for IOVA range
> + *
> + * @addr: base GPA addr to start the walk
> + * @start: IOVA range start address
> + * @end: IOVA range end address (start <= addr < end)
> + * @hook_fn: hook func to be called when detected page
> + * @private: private data to be passed into hook func
> + * @read: whether parent level has read permission
> + * @write: whether parent level has write permission
> + * @notify_unmap: whether we should notify invalid entries
> + */
> +static int vtd_page_walk_level(dma_addr_t addr, uint64_t start,
> + uint64_t end, vtd_page_walk_hook hook_fn,
> + void *private, uint32_t level,
> + bool read, bool write, bool notify_unmap)
> +{
> + bool read_cur, write_cur, entry_valid;
> + uint32_t offset;
> + uint64_t slpte;
> + uint64_t subpage_size, subpage_mask;
> + IOMMUTLBEntry entry;
> + uint64_t iova = start;
> + uint64_t iova_next;
> + int ret = 0;
> +
> + trace_vtd_page_walk_level(addr, level, start, end);
> +
> + subpage_size = 1ULL << vtd_slpt_level_shift(level);
> + subpage_mask = vtd_slpt_level_page_mask(level);
> +
> + while (iova < end) {
> + iova_next = (iova & subpage_mask) + subpage_size;
> +
> + offset = vtd_iova_level_offset(iova, level);
> + slpte = vtd_get_slpte(addr, offset);
> +
> + if (slpte == (uint64_t)-1) {
> + trace_vtd_page_walk_skip_read(iova, iova_next);
> + goto next;
> + }
> +
> + if (vtd_slpte_nonzero_rsvd(slpte, level)) {
> + trace_vtd_page_walk_skip_reserve(iova, iova_next);
> + goto next;
> + }
> +
> + /* Permissions are stacked with parents' */
> + read_cur = read && (slpte & VTD_SL_R);
> + write_cur = write && (slpte & VTD_SL_W);
> +
> + /*
> + * As long as we have either read/write permission, this is a
> + * valid entry. The rule works for both page entries and page
> + * table entries.
> + */
> + entry_valid = read_cur | write_cur;
> +
> + if (vtd_is_last_slpte(slpte, level)) {
> + entry.target_as = &address_space_memory;
> + entry.iova = iova & subpage_mask;
> + /* NOTE: this is only meaningful if entry_valid == true */
> + entry.translated_addr = vtd_get_slpte_addr(slpte);
> + entry.addr_mask = ~subpage_mask;
> + entry.perm = IOMMU_ACCESS_FLAG(read_cur, write_cur);
> + if (!entry_valid && !notify_unmap) {
> + trace_vtd_page_walk_skip_perm(iova, iova_next);
> + goto next;
> + }
> + trace_vtd_page_walk_one(level, entry.iova, entry.translated_addr,
> + entry.addr_mask, entry.perm);
> + if (hook_fn) {
> + ret = hook_fn(&entry, private);
> + if (ret < 0) {
> + return ret;
> + }
> + }
> + } else {
> + if (!entry_valid) {
> + trace_vtd_page_walk_skip_perm(iova, iova_next);
> + goto next;
> + }
> + ret = vtd_page_walk_level(vtd_get_slpte_addr(slpte), iova,
> + MIN(iova_next, end), hook_fn, private,
> + level - 1, read_cur, write_cur,
> + notify_unmap);
> + if (ret < 0) {
> + return ret;
> + }
> + }
> +
> +next:
> + iova = iova_next;
> + }
> +
> + return 0;
> +}
> +
> +/**
> + * vtd_page_walk - walk specific IOVA range, and call the hook
> + *
> + * @ce: context entry to walk upon
> + * @start: IOVA address to start the walk
> + * @end: IOVA range end address (start <= addr < end)
> + * @hook_fn: the hook that to be called for each detected area
> + * @private: private data for the hook function
> + */
> +static int vtd_page_walk(VTDContextEntry *ce, uint64_t start, uint64_t end,
> + vtd_page_walk_hook hook_fn, void *private)
> +{
> + dma_addr_t addr = vtd_get_slpt_base_from_context(ce);
> + uint32_t level = vtd_get_level_from_context_entry(ce);
> +
> + if (!vtd_iova_range_check(start, ce)) {
> + return -VTD_FR_ADDR_BEYOND_MGAW;
> + }
> +
> + if (!vtd_iova_range_check(end, ce)) {
> + /* Fix end so that it reaches the maximum */
> + end = vtd_iova_limit(ce);
> + }
> +
> + return vtd_page_walk_level(addr, start, end, hook_fn, private,
> + level, true, true, false);
> +}
> +
> /* Map a device to its corresponding domain (context-entry) */
> static int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num,
> uint8_t devfn, VTDContextEntry *ce)
> @@ -2402,6 +2542,37 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s,
> PCIBus *bus, int devfn)
> return vtd_dev_as;
> }
>
> +static int vtd_replay_hook(IOMMUTLBEntry *entry, void *private)
> +{
> + memory_region_notify_one((IOMMUNotifier *)private, entry);
> + return 0;
> +}
> +
> +static void vtd_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n)
> +{
> + VTDAddressSpace *vtd_as = container_of(mr, VTDAddressSpace, iommu);
> + IntelIOMMUState *s = vtd_as->iommu_state;
> + uint8_t bus_n = pci_bus_num(vtd_as->bus);
> + VTDContextEntry ce;
> +
> + if (vtd_dev_to_context_entry(s, bus_n, vtd_as->devfn, &ce) == 0) {
> + /*
> + * Scanned a valid context entry, walk over the pages and
> + * notify when needed.
> + */
> + trace_vtd_replay_ce_valid(bus_n, PCI_SLOT(vtd_as->devfn),
> + PCI_FUNC(vtd_as->devfn),
> + VTD_CONTEXT_ENTRY_DID(ce.hi),
> + ce.hi, ce.lo);
> + vtd_page_walk(&ce, 0, ~0ULL, vtd_replay_hook, (void *)n);
> + } else {
> + trace_vtd_replay_ce_invalid(bus_n, PCI_SLOT(vtd_as->devfn),
> + PCI_FUNC(vtd_as->devfn));
> + }
> +
> + return;
> +}
> +
> /* Do the initialization. It will also be called when reset, so pay
> * attention when adding new initialization stuff.
> */
> @@ -2416,6 +2587,7 @@ static void vtd_init(IntelIOMMUState *s)
>
> s->iommu_ops.translate = vtd_iommu_translate;
> s->iommu_ops.notify_flag_changed = vtd_iommu_notify_flag_changed;
> + s->iommu_ops.replay = vtd_iommu_replay;
> s->root = 0;
> s->root_extended = false;
> s->dmar_enabled = false;
> diff --git a/hw/i386/trace-events b/hw/i386/trace-events
> index baed874..f725bca 100644
> --- a/hw/i386/trace-events
> +++ b/hw/i386/trace-events
> @@ -30,6 +30,13 @@ vtd_iotlb_cc_hit(uint8_t bus, uint8_t devfn, uint64_t
> high, uint64_t low, uint32
> vtd_iotlb_cc_update(uint8_t bus, uint8_t devfn, uint64_t high, uint64_t low,
> uint32_t gen1, uint32_t gen2) "IOTLB context update bus 0x%"PRIx8" devfn
> 0x%"PRIx8" high 0x%"PRIx64" low 0x%"PRIx64" gen %"PRIu32" -> gen %"PRIu32
> vtd_iotlb_reset(const char *reason) "IOTLB reset (reason: %s)"
> vtd_fault_disabled(void) "Fault processing disabled for context entry"
> +vtd_replay_ce_valid(uint8_t bus, uint8_t dev, uint8_t fn, uint16_t domain,
> uint64_t hi, uint64_t lo) "replay valid context device
> %02"PRIx8":%02"PRIx8".%02"PRIx8" domain 0x%"PRIx16" hi 0x%"PRIx64" lo
> 0x%"PRIx64
> +vtd_replay_ce_invalid(uint8_t bus, uint8_t dev, uint8_t fn) "replay invalid
> context device %02"PRIx8":%02"PRIx8".%02"PRIx8
> +vtd_page_walk_level(uint64_t addr, uint32_t level, uint64_t start, uint64_t
> end) "walk (base=0x%"PRIx64", level=%"PRIu32") iova range 0x%"PRIx64" -
> 0x%"PRIx64
> +vtd_page_walk_one(uint32_t level, uint64_t iova, uint64_t gpa, uint64_t
> mask, int perm) "detected page level 0x%"PRIx32" iova 0x%"PRIx64" -> gpa
> 0x%"PRIx64" mask 0x%"PRIx64" perm %d"
> +vtd_page_walk_skip_read(uint64_t iova, uint64_t next) "Page walk skip iova
> 0x%"PRIx64" - 0x%"PRIx64" due to unable to read"
> +vtd_page_walk_skip_perm(uint64_t iova, uint64_t next) "Page walk skip iova
> 0x%"PRIx64" - 0x%"PRIx64" due to perm empty"
> +vtd_page_walk_skip_reserve(uint64_t iova, uint64_t next) "Page walk skip
> iova 0x%"PRIx64" - 0x%"PRIx64" due to rsrv set"
>
> # hw/i386/amd_iommu.c
> amdvi_evntlog_fail(uint64_t addr, uint32_t head) "error: fail to write at
> addr 0x%"PRIx64" + offset 0x%"PRIx32
> diff --git a/include/exec/memory.h b/include/exec/memory.h
> index c0280b7..c4fc94d 100644
> --- a/include/exec/memory.h
> +++ b/include/exec/memory.h
> @@ -55,6 +55,8 @@ typedef enum {
> IOMMU_RW = 3,
> } IOMMUAccessFlags;
>
> +#define IOMMU_ACCESS_FLAG(r, w) (((r) ? IOMMU_RO : 0) | ((w) ? IOMMU_WO : 0))
> +
> struct IOMMUTLBEntry {
> AddressSpace *target_as;
> hwaddr iova;
> --
> 2.7.4
- Re: [Qemu-devel] [PATCH v8 3/9] memory: provide iommu_replay_all(), (continued)
- [Qemu-devel] [PATCH v8 4/9] memory: introduce memory_region_notify_one(), Peter Xu, 2017/04/06
- [Qemu-devel] [PATCH v8 5/9] memory: add MemoryRegionIOMMUOps.replay() callback, Peter Xu, 2017/04/06
- [Qemu-devel] [PATCH v8 6/9] intel_iommu: use the correct memory region for device IOTLB notification, Peter Xu, 2017/04/06
- [Qemu-devel] [PATCH v8 7/9] intel_iommu: provide its own replay() callback, Peter Xu, 2017/04/06
- Re: [Qemu-devel] [PATCH v8 7/9] intel_iommu: provide its own replay() callback,
Michael S. Tsirkin <=
- [Qemu-devel] [PATCH v8 8/9] intel_iommu: allow dynamic switch of IOMMU region, Peter Xu, 2017/04/06
- [Qemu-devel] [PATCH v8 9/9] intel_iommu: enable remote IOTLB, Peter Xu, 2017/04/06
- Re: [Qemu-devel] [PATCH v8 0/9] VT-d: vfio enablement and misc enhances, Michael S. Tsirkin, 2017/04/06
- Re: [Qemu-devel] [PATCH v8 0/9] VT-d: vfio enablement and misc enhances, Michael S. Tsirkin, 2017/04/06