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Re: [Qemu-devel] [PATCH v12 17/27] target/arm: [tcg] Port to insn_start
From: |
Alex Bennée |
Subject: |
Re: [Qemu-devel] [PATCH v12 17/27] target/arm: [tcg] Port to insn_start |
Date: |
Wed, 12 Jul 2017 10:32:35 +0100 |
User-agent: |
mu4e 0.9.19; emacs 25.2.50.3 |
Lluís Vilanova <address@hidden> writes:
> Incrementally paves the way towards using the generic instruction translation
> loop.
>
> Signed-off-by: Lluís Vilanova <address@hidden>
> Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
> ---
> target/arm/translate.c | 36 +++++++++++++++++++++---------------
> 1 file changed, 21 insertions(+), 15 deletions(-)
>
> diff --git a/target/arm/translate.c b/target/arm/translate.c
> index 22af4e372a..7a1935d4d7 100644
> --- a/target/arm/translate.c
> +++ b/target/arm/translate.c
> @@ -11896,6 +11896,26 @@ static void arm_tr_tb_start(DisasContextBase
> *dcbase, CPUState *cpu)
> }
> }
>
> +static void arm_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
> +{
> + DisasContext *dc = container_of(dcbase, DisasContext, base);
> +
> + dc->insn_start_idx = tcg_op_buf_count();
> + tcg_gen_insn_start(dc->pc,
> + (dc->condexec_cond << 4) | (dc->condexec_mask >> 1),
> + 0);
> +
> +#ifdef CONFIG_USER_ONLY
> + /* Intercept jump to the magic kernel page. */
> + if (dc->pc >= 0xffff0000) {
> + /* We always get here via a jump, so know we are not in a
> + conditional execution block. */
> + gen_exception_internal(EXCP_KERNEL_TRAP);
> + dc->base.is_jmp = DISAS_EXC;
> + }
> +#endif
> +}
> +
> /* generate intermediate code for basic block 'tb'. */
> void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
> {
> @@ -11939,21 +11959,7 @@ void gen_intermediate_code(CPUState *cs,
> TranslationBlock *tb)
>
> do {
> dc->base.num_insns++;
> - dc->insn_start_idx = tcg_op_buf_count();
> - tcg_gen_insn_start(dc->pc,
> - (dc->condexec_cond << 4) | (dc->condexec_mask >>
> 1),
> - 0);
> -
> -#ifdef CONFIG_USER_ONLY
> - /* Intercept jump to the magic kernel page. */
> - if (dc->pc >= 0xffff0000) {
> - /* We always get here via a jump, so know we are not in a
> - conditional execution block. */
> - gen_exception_internal(EXCP_KERNEL_TRAP);
> - dc->base.is_jmp = DISAS_EXC;
> - break;
> - }
> -#endif
> + arm_tr_insn_start(&dc->base, cs);
>
> if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
> CPUBreakpoint *bp;
--
Alex Bennée
- [Qemu-devel] [PATCH v12 12/27] target/i386: [tcg] Port to generic translation framework, (continued)
- [Qemu-devel] [PATCH v12 12/27] target/i386: [tcg] Port to generic translation framework, Lluís Vilanova, 2017/07/07
- [Qemu-devel] [PATCH v12 13/27] target/arm: [tcg] Port to DisasContextBase, Lluís Vilanova, 2017/07/07
- [Qemu-devel] [PATCH v12 14/27] target/arm: [tcg] Port to init_disas_context, Lluís Vilanova, 2017/07/07
- [Qemu-devel] [PATCH v12 15/27] target/arm: [tcg, a64] Port to init_disas_context, Lluís Vilanova, 2017/07/07
- [Qemu-devel] [PATCH v12 16/27] target/arm: [tcg] Port to tb_start, Lluís Vilanova, 2017/07/07
- [Qemu-devel] [PATCH v12 17/27] target/arm: [tcg] Port to insn_start, Lluís Vilanova, 2017/07/07
- Re: [Qemu-devel] [PATCH v12 17/27] target/arm: [tcg] Port to insn_start,
Alex Bennée <=
- [Qemu-devel] [PATCH v12 18/27] target/arm: [tcg, a64] Port to insn_start, Lluís Vilanova, 2017/07/07
- [Qemu-devel] [PATCH v12 19/27] target/arm: [tcg] Port to breakpoint_check, Lluís Vilanova, 2017/07/07
- [Qemu-devel] [PATCH v12 20/27] target/arm: [tcg, a64] Port to breakpoint_check, Lluís Vilanova, 2017/07/07
- [Qemu-devel] [PATCH v12 21/27] target/arm: [tcg] Port to translate_insn, Lluís Vilanova, 2017/07/07
- [Qemu-devel] [PATCH v12 22/27] target/arm: [tcg, a64] Port to translate_insn, Lluís Vilanova, 2017/07/07
- [Qemu-devel] [PATCH v12 23/27] target/arm: [tcg] Port to tb_stop, Lluís Vilanova, 2017/07/07
- [Qemu-devel] [PATCH v12 24/27] target/arm: [tcg, a64] Port to tb_stop, Lluís Vilanova, 2017/07/07