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[Qemu-devel] [PATCH v13 05/26] target/i386: [tcg] Port to init_disas_con
From: |
Lluís Vilanova |
Subject: |
[Qemu-devel] [PATCH v13 05/26] target/i386: [tcg] Port to init_disas_context |
Date: |
Fri, 14 Jul 2017 11:33:44 +0300 |
User-agent: |
StGit/0.17.1-dirty |
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Benneé <address@hidden>
---
target/i386/translate.c | 41 +++++++++++++++++++++++------------------
1 file changed, 23 insertions(+), 18 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index f61f5c7227..7819545e37 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -8379,20 +8379,12 @@ void tcg_x86_init(void)
}
}
-/* generate intermediate code for basic block 'tb'. */
-void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
+static void i386_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
{
- CPUX86State *env = cs->env_ptr;
- DisasContext dc1, *dc = &dc1;
- uint32_t flags;
- target_ulong cs_base;
- int num_insns;
- int max_insns;
-
- /* generate intermediate code */
- dc->base.pc_first = tb->pc;
- cs_base = tb->cs_base;
- flags = tb->flags;
+ DisasContext *dc = container_of(dcbase, DisasContext, base);
+ CPUX86State *env = cpu->env_ptr;
+ uint32_t flags = dc->base.tb->flags;
+ target_ulong cs_base = dc->base.tb->cs_base;
dc->pe = (flags >> HF_PE_SHIFT) & 1;
dc->code32 = (flags >> HF_CS32_SHIFT) & 1;
@@ -8403,11 +8395,9 @@ void gen_intermediate_code(CPUState *cs,
TranslationBlock *tb)
dc->cpl = (flags >> HF_CPL_SHIFT) & 3;
dc->iopl = (flags >> IOPL_SHIFT) & 3;
dc->tf = (flags >> TF_SHIFT) & 1;
- dc->base.singlestep_enabled = cs->singlestep_enabled;
dc->cc_op = CC_OP_DYNAMIC;
dc->cc_op_dirty = false;
dc->cs_base = cs_base;
- dc->base.tb = tb;
dc->popl_esp_hack = 0;
/* select memory access functions */
dc->mem_index = 0;
@@ -8425,7 +8415,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock
*tb)
dc->code64 = (flags >> HF_CS64_SHIFT) & 1;
#endif
dc->flags = flags;
- dc->jmp_opt = !(dc->tf || cs->singlestep_enabled ||
+ dc->jmp_opt = !(dc->tf || dc->base.singlestep_enabled ||
(flags & HF_INHIBIT_IRQ_MASK));
/* Do not optimize repz jumps at all in icount mode, because
rep movsS instructions are execured with different paths
@@ -8437,7 +8427,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock
*tb)
record/replay modes and there will always be an
additional step for ecx=0 when icount is enabled.
*/
- dc->repz_opt = !dc->jmp_opt && !(tb->cflags & CF_USE_ICOUNT);
+ dc->repz_opt = !dc->jmp_opt && !(dc->base.tb->cflags & CF_USE_ICOUNT);
#if 0
/* check addseg logic */
if (!dc->addseg && (dc->vm86 || !dc->pe || !dc->code32))
@@ -8456,9 +8446,24 @@ void gen_intermediate_code(CPUState *cs,
TranslationBlock *tb)
cpu_ptr0 = tcg_temp_new_ptr();
cpu_ptr1 = tcg_temp_new_ptr();
cpu_cc_srcT = tcg_temp_local_new();
+}
+/* generate intermediate code for basic block 'tb'. */
+void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
+{
+ CPUX86State *env = cs->env_ptr;
+ DisasContext dc1, *dc = &dc1;
+ int num_insns;
+ int max_insns;
+
+ /* generate intermediate code */
+ dc->base.singlestep_enabled = cs->singlestep_enabled;
+ dc->base.tb = tb;
dc->base.is_jmp = DISAS_NEXT;
+ dc->base.pc_first = tb->pc;
dc->base.pc_next = dc->base.pc_first;
+ i386_tr_init_disas_context(&dc->base, cs);
+
num_insns = 0;
max_insns = tb->cflags & CF_COUNT_MASK;
if (max_insns == 0) {
@@ -8500,7 +8505,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock
*tb)
the flag and abort the translation to give the irqs a
change to be happen */
if (dc->tf || dc->base.singlestep_enabled ||
- (flags & HF_INHIBIT_IRQ_MASK)) {
+ (dc->base.tb->flags & HF_INHIBIT_IRQ_MASK)) {
gen_jmp_im(dc->base.pc_next - dc->cs_base);
gen_eob(dc);
break;
- [Qemu-devel] [PATCH v13 00/26] translate: [tcg] Generic translation framework, Lluís Vilanova, 2017/07/14
- [Qemu-devel] [PATCH v13 01/26] Pass generic CPUState to gen_intermediate_code(), Lluís Vilanova, 2017/07/14
- [Qemu-devel] [PATCH v13 02/26] target: [tcg] Use a generic enum for DISAS_ values, Lluís Vilanova, 2017/07/14
- [Qemu-devel] [PATCH v13 03/26] target: [tcg] Add generic translation framework, Lluís Vilanova, 2017/07/14
- [Qemu-devel] [PATCH v13 04/26] target/i386: [tcg] Port to DisasContextBase, Lluís Vilanova, 2017/07/14
- [Qemu-devel] [PATCH v13 05/26] target/i386: [tcg] Port to init_disas_context,
Lluís Vilanova <=
- [Qemu-devel] [PATCH v13 06/26] target/i386: [tcg] Port to insn_start, Lluís Vilanova, 2017/07/14
- [Qemu-devel] [PATCH v13 07/26] target/i386: [tcg] Port to breakpoint_check, Lluís Vilanova, 2017/07/14
- [Qemu-devel] [PATCH v13 08/26] target/i386: [tcg] Port to translate_insn, Lluís Vilanova, 2017/07/14
- [Qemu-devel] [PATCH v13 09/26] target/i386: [tcg] Port to tb_stop, Lluís Vilanova, 2017/07/14
- [Qemu-devel] [PATCH v13 10/26] target/i386: [tcg] Port to disas_log, Lluís Vilanova, 2017/07/14
- [Qemu-devel] [PATCH v13 11/26] target/i386: [tcg] Port to generic translation framework, Lluís Vilanova, 2017/07/14
- [Qemu-devel] [PATCH v13 12/26] target/arm: [tcg] Port to DisasContextBase, Lluís Vilanova, 2017/07/14
- [Qemu-devel] [PATCH v13 13/26] target/arm: [tcg] Port to init_disas_context, Lluís Vilanova, 2017/07/14
- [Qemu-devel] [PATCH v13 14/26] target/arm: [tcg, a64] Port to init_disas_context, Lluís Vilanova, 2017/07/14
- [Qemu-devel] [PATCH v13 15/26] target/arm: [tcg] Port to tb_start, Lluís Vilanova, 2017/07/14