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[Qemu-devel] [PATCH v14 12/34] target/i386: [tcg] Port to breakpoint_che
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v14 12/34] target/i386: [tcg] Port to breakpoint_check |
Date: |
Fri, 14 Jul 2017 23:42:21 -1000 |
From: Lluís Vilanova <address@hidden>
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/i386/translate.c | 46 ++++++++++++++++++++++++++++++++++------------
1 file changed, 34 insertions(+), 12 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 6e1243a..a009710 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -8455,6 +8455,26 @@ static void i386_tr_insn_start(DisasContextBase *dcbase,
CPUState *cpu)
tcg_gen_insn_start(dc->base.pc_next, dc->cc_op);
}
+static bool i386_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu,
+ const CPUBreakpoint *bp)
+{
+ DisasContext *dc = container_of(dcbase, DisasContext, base);
+ /* If RF is set, suppress an internally generated breakpoint. */
+ int flags = dc->base.tb->flags & HF_RF_MASK ? BP_GDB : BP_ANY;
+ if (bp->flags & flags) {
+ gen_debug(dc, dc->base.pc_next - dc->cs_base);
+ dc->base.is_jmp = DISAS_NORETURN;
+ /* The address covered by the breakpoint must be included in
+ [tb->pc, tb->pc + tb->size) in order to for it to be
+ properly cleared -- thus we increment the PC here so that
+ the logic setting tb->size below does the right thing. */
+ dc->base.pc_next += 1;
+ return true;
+ } else {
+ return false;
+ }
+}
+
/* generate intermediate code for basic block 'tb'. */
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
{
@@ -8485,18 +8505,21 @@ void gen_intermediate_code(CPUState *cs,
TranslationBlock *tb)
i386_tr_insn_start(&dc->base, cs);
num_insns++;
- /* If RF is set, suppress an internally generated breakpoint. */
- if (unlikely(cpu_breakpoint_test(cs, dc->base.pc_next,
- tb->flags & HF_RF_MASK
- ? BP_GDB : BP_ANY))) {
- gen_debug(dc, dc->base.pc_next - dc->cs_base);
- /* The address covered by the breakpoint must be included in
- [tb->pc, tb->pc + tb->size) in order to for it to be
- properly cleared -- thus we increment the PC here so that
- the logic setting tb->size below does the right thing. */
- dc->base.pc_next += 1;
- goto done_generating;
+ if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
+ CPUBreakpoint *bp;
+ QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
+ if (bp->pc == dc->base.pc_next) {
+ if (i386_tr_breakpoint_check(&dc->base, cs, bp)) {
+ break;
+ }
+ }
+ }
+
+ if (dc->base.is_jmp == DISAS_NORETURN) {
+ break;
+ }
}
+
if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) {
gen_io_start();
}
@@ -8547,7 +8570,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock
*tb)
}
if (tb->cflags & CF_LAST_IO)
gen_io_end();
-done_generating:
gen_tb_end(tb, num_insns);
#ifdef DEBUG_DISAS
--
2.9.4
- [Qemu-devel] [PATCH v14 02/34] tcg: Add generic DISAS_NORETURN, (continued)
- [Qemu-devel] [PATCH v14 02/34] tcg: Add generic DISAS_NORETURN, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 01/34] Pass generic CPUState to gen_intermediate_code(), Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 03/34] target/i386: Use generic DISAS_* enumerators, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 04/34] target/arm: Use DISAS_NORETURN, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 06/34] target/arm: Delay check for magic kernel page, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 07/34] target/arm: Set is_jmp properly after single-stepping, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 05/34] target: [tcg] Use a generic enum for DISAS_ values, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 08/34] tcg: Add generic translation framework, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 10/34] target/i386: [tcg] Port to init_disas_context, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 09/34] target/i386: [tcg] Port to DisasContextBase, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 12/34] target/i386: [tcg] Port to breakpoint_check,
Richard Henderson <=
- [Qemu-devel] [PATCH v14 11/34] target/i386: [tcg] Port to insn_start, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 13/34] target/i386: [tcg] Port to translate_insn, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 14/34] target/i386: [tcg] Port to tb_stop, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 16/34] target/i386: [tcg] Port to generic translation framework, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 15/34] target/i386: [tcg] Port to disas_log, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 19/34] target/arm: [tcg, a64] Port to init_disas_context, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 18/34] target/arm: [tcg] Port to init_disas_context, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 17/34] target/arm: [tcg] Port to DisasContextBase, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 21/34] target/arm: [tcg] Port to insn_start, Richard Henderson, 2017/07/15
- [Qemu-devel] [PATCH v14 20/34] target/arm: [tcg] Port to tb_start, Richard Henderson, 2017/07/15