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[Qemu-devel] [PATCH v15 17/32] target/arm: [tcg, a64] Port to init_disas
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v15 17/32] target/arm: [tcg, a64] Port to init_disas_context |
Date: |
Mon, 24 Jul 2017 13:27:13 -0700 |
From: Lluís Vilanova <address@hidden>
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Benneé <address@hidden>
Message-Id: <address@hidden>
[rth: Adjust for max_insns interface change.]
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate-a64.c | 38 ++++++++++++++++++++++++--------------
1 file changed, 24 insertions(+), 14 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 7e2dee59ca..2919e5a636 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11179,21 +11179,12 @@ static void disas_a64_insn(CPUARMState *env,
DisasContext *s)
free_tmp_a64(s);
}
-void gen_intermediate_code_a64(DisasContextBase *dcbase, CPUState *cs,
- TranslationBlock *tb)
+static int aarch64_tr_init_disas_context(DisasContextBase *dcbase,
+ CPUState *cpu, int max_insns)
{
- CPUARMState *env = cs->env_ptr;
- ARMCPU *cpu = arm_env_get_cpu(env);
DisasContext *dc = container_of(dcbase, DisasContext, base);
- target_ulong next_page_start;
- int max_insns;
-
- dc->base.tb = tb;
- dc->base.pc_first = dc->base.tb->pc;
- dc->base.pc_next = dc->base.pc_first;
- dc->base.is_jmp = DISAS_NEXT;
- dc->base.num_insns = 0;
- dc->base.singlestep_enabled = cs->singlestep_enabled;
+ CPUARMState *env = cpu->env_ptr;
+ ARMCPU *arm_cpu = arm_env_get_cpu(env);
dc->pc = dc->base.pc_first;
dc->condjmp = 0;
@@ -11219,7 +11210,7 @@ void gen_intermediate_code_a64(DisasContextBase
*dcbase, CPUState *cs,
dc->fp_excp_el = ARM_TBFLAG_FPEXC_EL(dc->base.tb->flags);
dc->vec_len = 0;
dc->vec_stride = 0;
- dc->cp_regs = cpu->cp_regs;
+ dc->cp_regs = arm_cpu->cp_regs;
dc->features = env->features;
/* Single step state. The code-generation logic here is:
@@ -11244,6 +11235,24 @@ void gen_intermediate_code_a64(DisasContextBase
*dcbase, CPUState *cs,
init_tmp_a64_array(dc);
+ return max_insns;
+}
+
+void gen_intermediate_code_a64(DisasContextBase *dcbase, CPUState *cs,
+ TranslationBlock *tb)
+{
+ CPUARMState *env = cs->env_ptr;
+ DisasContext *dc = container_of(dcbase, DisasContext, base);
+ target_ulong next_page_start;
+ int max_insns;
+
+ dc->base.tb = tb;
+ dc->base.pc_first = dc->base.tb->pc;
+ dc->base.pc_next = dc->base.pc_first;
+ dc->base.is_jmp = DISAS_NEXT;
+ dc->base.num_insns = 0;
+ dc->base.singlestep_enabled = cs->singlestep_enabled;
+
next_page_start = (dc->base.pc_first & TARGET_PAGE_MASK) +
TARGET_PAGE_SIZE;
max_insns = dc->base.tb->cflags & CF_COUNT_MASK;
if (max_insns == 0) {
@@ -11252,6 +11261,7 @@ void gen_intermediate_code_a64(DisasContextBase
*dcbase, CPUState *cs,
if (max_insns > TCG_MAX_INSNS) {
max_insns = TCG_MAX_INSNS;
}
+ max_insns = aarch64_tr_init_disas_context(&dc->base, cs, max_insns);
gen_tb_start(tb);
--
2.13.3
- [Qemu-devel] [PATCH v15 06/32] tcg: Add generic translation framework, (continued)
- [Qemu-devel] [PATCH v15 06/32] tcg: Add generic translation framework, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 08/32] target/i386: [tcg] Port to init_disas_context, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 09/32] target/i386: [tcg] Port to insn_start, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 11/32] target/i386: [tcg] Port to translate_insn, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 07/32] target/i386: [tcg] Port to DisasContextBase, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 10/32] target/i386: [tcg] Port to breakpoint_check, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 13/32] target/i386: [tcg] Port to disas_log, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 12/32] target/i386: [tcg] Port to tb_stop, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 14/32] target/i386: [tcg] Port to generic translation framework, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 16/32] target/arm: [tcg] Port to init_disas_context, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 17/32] target/arm: [tcg, a64] Port to init_disas_context,
Richard Henderson <=
- [Qemu-devel] [PATCH v15 18/32] target/arm: [tcg] Port to tb_start, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 15/32] target/arm: [tcg] Port to DisasContextBase, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 19/32] target/arm: [tcg] Port to insn_start, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 20/32] target/arm: [tcg, a64] Port to insn_start, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 21/32] target/arm: [tcg, a64] Port to breakpoint_check, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 22/32] target/arm: [tcg] Port to translate_insn, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 23/32] target/arm: [tcg, a64] Port to translate_insn, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 24/32] target/arm: [tcg] Port to tb_stop, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 25/32] target/arm: [tcg, a64] Port to tb_stop, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 27/32] target/arm: [tcg, a64] Port to disas_log, Richard Henderson, 2017/07/24